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2020 – today
- 2024
[j98]Anish Krishnakumar
, Hanguang Yu, Tutu Ajayi, A. Alper Goksoy, Vishrut Pandey, Joshua Mack, Md Sahil Hassan, Kuan-Yu Chen, Chaitali Chakrabarti, Daniel W. Bliss, Ali Akoglu, Hun-Seok Kim, Ronald G. Dreslinski, David T. Blaauw, Ümit Y. Ogras:
FALCON: An FPGA Emulation Platform for Domain-Specific SoCs (DSSoCs). IEEE Des. Test 41(1): 70-80 (2024)- [j97]Xing Chen, Anish Krishnakumar, Ümit Y. Ogras, Chaitali Chakrabarti:
PED: Probabilistic Energy-efficient Deadline-aware scheduler for heterogeneous SoCs. J. Syst. Archit. 147: 103051 (2024) - [j96]Benjamin R. Willis, Aviral Shrivastava, Joshua Mack, Shail Dave, Chaitali Chakrabarti, John S. Brunhaver:
Cyclebite: Extracting Task Graphs From Unstructured Compute-Programs. IEEE Trans. Computers 73(1): 221-234 (2024) - [c176]Jingtao Li, Xing Chen, Li Yang, Adnan Siraj Rakin, Deliang Fan, Chaitali Chakrabarti:
EMGAN: Early-Mix-GAN on Extracting Server-Side Model in Split Federated Learning. AAAI 2024: 13545-13553 - [c175]Zhenyu Wang, Jingbo Sun, A. Alper Goksoy, Sumit K. Mandal, Yaotian Liu, Jae-Sun Seo, Chaitali Chakrabarti, Ümit Y. Ogras, Vidya A. Chhabria, Jeff Zhang, Yu Cao:
Exploiting 2.5D/3D Heterogeneous Integration for AI Computing. ASPDAC 2024: 758-764 - 2023
- [j95]Shunyao Wu, Chaitali Chakrabarti, Ahmed Alkhateeb:
Proactively Predicting Dynamic 6G Link Blockages Using LiDAR and In-Band Signatures. IEEE Open J. Commun. Soc. 4: 392-412 (2023) - [j94]Hanguang Yu, Andrew Herschfelt, Shunyao Wu, Sharanya Srinivas, Yang Li, Nunzio Sciammetta, Leslie Smith, Klaus Rueger, Hyunseok Lee, Chaitali Chakrabarti, Daniel W. Bliss:
Communications and High-Precision Positioning (CHP2): Hardware Architecture, Implementation, and Validation. Sensors 23(3): 1343 (2023) - [c174]Zhenyu Wang, Jingbo Sun, A. Alper Goksoy, Sumit K. Mandal, Jae-Sun Seo, Chaitali Chakrabarti, Ümit Y. Ogras, Vidya A. Chhabria, Yu Cao:
Benchmarking Heterogeneous Integration with 2.5D/3D Interconnect Modeling. ASICON 2023: 1-4 - [c173]Jingtao Li, Lingjuan Lyu, Daisuke Iso, Chaitali Chakrabarti, Michael Spranger:
MocoSFL: enabling cross-client collaborative self-supervised learning. ICLR 2023 - [c172]Yan Xiong, Visar Berisha, Chaitali Chakrabarti:
Aligning Speech Enhancement for Improving Downstream Classification Performance. INTERSPEECH 2023: 3874-3878 - [i20]Yichen Yang, Jingtao Li, Nishil Talati, Subhankar Pal, Siying Feng, Chaitali Chakrabarti, Trevor N. Mudge, Ronald G. Dreslinski:
Accelerating Graph Analytics on a Reconfigurable Architecture with a Data-Indirect Prefetcher. CoRR abs/2301.12312 (2023) - [i19]Jingtao Li, Adnan Siraj Rakin, Xing Chen, Li Yang, Zhezhi He, Deliang Fan, Chaitali Chakrabarti:
Model Extraction Attacks on Split Federated Learning. CoRR abs/2303.08581 (2023) - 2022
- [j93]Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-Sun Seo, Ümit Y. Ogras, Yu Cao:
Impact of On-chip Interconnect on In-memory Acceleration of Deep Neural Networks. ACM J. Emerg. Technol. Comput. Syst. 18(2): 34:1-34:22 (2022) - [j92]Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim:
Versa: A 36-Core Systolic Multiprocessor With Dynamically Reconfigurable Interconnect and Memory. IEEE J. Solid State Circuits 57(4): 986-998 (2022) - [j91]Shunyao Wu, Muhammad Alrabeiah, Chaitali Chakrabarti, Ahmed Alkhateeb:
Blockage Prediction Using Wireless Signatures: Deep Learning Enables Real-World Demonstration. IEEE Open J. Commun. Soc. 3: 776-796 (2022) - [j90]Adnan Siraj Rakin, Zhezhi He, Jingtao Li, Fan Yao, Chaitali Chakrabarti, Deliang Fan:
T-BFA: Targeted Bit-Flip Adversarial Weight Attack. IEEE Trans. Pattern Anal. Mach. Intell. 44(11): 7928-7939 (2022) - [j89]Xing Chen, Ümit Y. Ogras, Chaitali Chakrabarti:
Probabilistic Risk-Aware Scheduling with Deadline Constraint for Heterogeneous SoCs. ACM Trans. Embed. Comput. Syst. 21(2): 15:1-15:27 (2022) - [j88]Xing Chen, Jingtao Li, Chaitali Chakrabarti:
Energy and Loss-aware Selective Updating for SplitFed Learning with Energy Harvesting-Powered Devices. J. Signal Process. Syst. 94(10): 961-975 (2022) - [c171]Jingtao Li, Adnan Siraj Rakin, Xing Chen, Zhezhi He, Deliang Fan, Chaitali Chakrabarti:
ResSFL: A Resistance Transfer Framework for Defending Model Inversion Attack in Split Federated Learning. CVPR 2022: 10184-10192 - [c170]Shunyao Wu, Muhammad Alrabeiah, Andrew Hredzak, Chaitali Chakrabarti, Ahmed Alkhateeb:
Deep Learning for Moving Blockage Prediction using Real mmWave Measurements. ICC 2022: 3753-3758 - [c169]Gokul Krishnan, A. Alper Goksoy, Sumit K. Mandal, Zhenyu Wang, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao:
Big-Little Chiplets for In-Memory Acceleration of DNNs: A Scalable Heterogeneous Architecture. ICCAD 2022: 8:1-8:9 - [c168]Yan Xiong, Jingtao Li, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti:
Improving Energy Efficiency of Convolutional Neural Networks on Multi-core Architectures through Run-time Reconfiguration. ISCAS 2022: 375-379 - [c167]Daniel W. Bliss, Tutu Ajayi, Ali Akoglu, Ilkin Aliyev, Toygun Basaklar, Leul Belayneh, David T. Blaauw, John S. Brunhaver, Chaitali Chakrabarti, Liangliang Chang, Kuan-Yu Chen, Ming-Hung Chen, Xing Chen, Alex R. Chiriyath, Alhad Daftardar, Ronald G. Dreslinski, Arindam Dutta, Allen-Jasmin Farcas, Y. Fu, A. Alper Goksoy, X. He, Md Sahil Hassan, Andrew Herschfelt, Jacob Holtom, Hun-Seok Kim, A. N. Krishnakumar, Y. Li, Owen Ma, Joshua Mack, Saurav Mallik, Sumit K. Mandal, Radu Marculescu, Brittany M. McCall, Trevor N. Mudge, Ümit Y. Ogras, Vishrut Pandey, Saquib Ahmad Siddiqui, Yu-Hsiu Sun, Adarsh A. Venkataramani, Xiangdong Wei, B. R. Willis, Hanguang Yu, Yufan Yue:
Enabling Software-Defined RF Convergence with a Novel Coarse-Scale Heterogeneous Processor. ISCAS 2022: 443-447 - [c166]Liangliang Chang, Joshua Mack, Benjamin R. Willis, Xing Chen, John S. Brunhaver, Ali Akoglu, Chaitali Chakrabarti:
Profile-Guided Parallel Task Extraction and Execution for Domain Specific Heterogeneous SoC. ISPA/BDCloud/SocialCom/SustainCom 2022: 913-920 - [c165]Jingtao Li, Jian Zhou, Yan Xiong, Xing Chen, Chaitali Chakrabarti:
An Adjustable Farthest Point Sampling Method for Approximately-sorted Point Cloud Data. SiPS 2022: 1-6 - [c164]Shunyao Wu, Chaitali Chakrabarti, Ahmed Alkhateeb:
LiDAR-Aided Mobile Blockage Prediction in Real-World Millimeter Wave Systems. WCNC 2022: 2631-2636 - [i18]Jingtao Li, Adnan Siraj Rakin, Xing Chen, Zhezhi He, Deliang Fan, Chaitali Chakrabarti:
ResSFL: A Resistance Transfer Framework for Defending Model Inversion Attack in Split Federated Learning. CoRR abs/2205.04007 (2022) - [i17]Jingtao Li, Jian Zhou, Yan Xiong, Xing Chen, Chaitali Chakrabarti:
An Adjustable Farthest Point Sampling Method for Approximately-sorted Point Cloud Data. CoRR abs/2208.08795 (2022) - [i16]Shunyao Wu, Chaitali Chakrabarti, Ahmed Alkhateeb:
Proactively Predicting Dynamic 6G Link Blockages Using LiDAR and In-Band Signatures. CoRR abs/2211.09535 (2022) - [i15]Liangliang Chang, Joshua Mack, Benjamin R. Willis, Xing Chen, John S. Brunhaver, Ali Akoglu, Chaitali Chakrabarti:
Profile-Guided Parallel Task Extraction and Execution for Domain Specific Heterogeneous SoC. CoRR abs/2211.14547 (2022) - 2021
- [j87]Gokul Krishnan, Sumit K. Mandal, Manvitha Pannala, Chaitali Chakrabarti, Jae-Sun Seo, Ümit Y. Ogras, Yu Cao:
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks. ACM Trans. Embed. Comput. Syst. 20(5s): 68:1-68:24 (2021) - [j86]Jian Zhou, Sumit K. Mandal, Brendan L. West, Siyuan Wei, Ümit Y. Ogras, Oliver D. Kripfgans, J. Brian Fowlkes, Thomas F. Wenisch, Chaitali Chakrabarti:
Front-End Architecture Design for Low-Complexity 3-D Ultrasound Imaging Based on Synthetic Aperture Sequential Beamforming. IEEE Trans. Very Large Scale Integr. Syst. 29(2): 333-346 (2021) - [c163]Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-Sun Seo, Ümit Y. Ogras, Yu Cao:
System-Level Benchmarking of Chiplet-based IMC Architectures for Deep Neural Network Acceleration. ASICON 2021: 1-4 - [c162]Siying Feng, Jiawen Sun, Subhankar Pal, Xin He, Kuba Kaszyk, Dong-Hyeon Park, John Magnus Morton, Trevor N. Mudge, Murray Cole, Michael F. P. O'Boyle, Chaitali Chakrabarti, Ronald G. Dreslinski:
CoSPARSE: A Software and Hardware Reconfigurable SpMV Framework for Graph Analytics. DAC 2021: 949-954 - [c161]Jingtao Li, Adnan Siraj Rakin, Zhezhi He, Deliang Fan, Chaitali Chakrabarti:
RADAR: Run-time Adversarial Weight Attack Detection and Accuracy Recovery. DATE 2021: 790-795 - [c160]Jingtao Li, Zhezhi He, Adnan Siraj Rakin, Deliang Fan, Chaitali Chakrabarti:
NeurObfuscator: A Full-stack Obfuscation Tool to Mitigate Neural Architecture Stealing. HOST 2021: 248-258 - [c159]Yan Xiong, Visar Berisha, Chaitali Chakrabarti:
Computationally-efficient voice activity detection based on deep neural networks. SiPS 2021: 64-69 - [c158]Xing Chen, Jingtao Li, Chaitali Chakrabarti:
Communication and Computation Reduction for Split Learning using Asynchronous Training. SiPS 2021: 76-81 - [c157]Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim:
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm. VLSI Circuits 2021: 1-2 - [i14]Shunyao Wu, Muhammad Alrabeiah, Andrew Hredzak, Chaitali Chakrabarti, Ahmed Alkhateeb:
Deep Learning for Moving Blockage Prediction using Real Millimeter Wave Measurements. CoRR abs/2101.06886 (2021) - [i13]Jingtao Li, Adnan Siraj Rakin, Zhezhi He, Deliang Fan, Chaitali Chakrabarti:
RADAR: Run-time Adversarial Weight Attack Detection and Accuracy Recovery. CoRR abs/2101.08254 (2021) - [i12]Adnan Siraj Rakin, Li Yang, Jingtao Li, Fan Yao, Chaitali Chakrabarti, Yu Cao, Jae-sun Seo, Deliang Fan:
RA-BNN: Constructing Robust & Accurate Binary Neural Network to Simultaneously Defend Adversarial Bit-Flip Attack and Improve Accuracy. CoRR abs/2103.13813 (2021) - [i11]Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao:
Impact of On-Chip Interconnect on In-Memory Acceleration of Deep Neural Networks. CoRR abs/2107.02358 (2021) - [i10]Xing Chen, Jingtao Li, Chaitali Chakrabarti:
Communication and Computation Reduction for Split Learning using Asynchronous Training. CoRR abs/2107.09786 (2021) - [i9]Jingtao Li, Zhezhi He, Adnan Siraj Rakin, Deliang Fan, Chaitali Chakrabarti:
NeurObfuscator: A Full-stack Obfuscation Tool to Mitigate Neural Architecture Stealing. CoRR abs/2107.09789 (2021) - [i8]Gokul Krishnan, Sumit K. Mandal, Manvitha Pannala, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao:
SIAM: Chiplet-based Scalable In-Memory Acceleration with Mesh for Deep Neural Networks. CoRR abs/2108.08903 (2021) - [i7]Sung Kim, Morteza Fayazi, Alhad Daftardar, Kuan-Yu Chen, Jielun Tan, Subhankar Pal, Tutu Ajayi, Yan Xiong, Trevor N. Mudge, Chaitali Chakrabarti, David T. Blaauw, Ronald G. Dreslinski, Hun-Seok Kim:
Versa: A Dataflow-Centric Multiprocessor with 36 Systolic ARM Cortex-M4F Cores and a Reconfigurable Crossbar-Memory Hierarchy in 28nm. CoRR abs/2109.03024 (2021) - [i6]Shunyao Wu, Muhammad Alrabeiah, Chaitali Chakrabarti, Ahmed Alkhateeb:
Blockage Prediction Using Wireless Signatures: Deep Learning Enables Real-World Demonstration. CoRR abs/2111.08242 (2021) - [i5]Shunyao Wu, Chaitali Chakrabarti, Ahmed Alkhateeb:
LiDAR-Aided Mobile Blockage Prediction in Real-World Millimeter Wave Systems. CoRR abs/2111.09581 (2021) - 2020
- [j85]Gokul Krishnan, Sumit K. Mandal, Chaitali Chakrabarti, Jae-sun Seo, Ümit Y. Ogras, Yu Cao:
Interconnect-Aware Area and Energy Optimization for In-Memory Acceleration of DNNs. IEEE Des. Test 37(6): 79-87 (2020) - [j84]Sumit K. Mandal, Gokul Krishnan, Chaitali Chakrabarti, Jae-Sun Seo, Yu Cao, Ümit Y. Ogras:
A Latency-Optimized Reconfigurable NoC for In-Memory Acceleration of DNNs. IEEE J. Emerg. Sel. Topics Circuits Syst. 10(3): 362-375 (2020) - [j83]Dong-Hyeon Park, Subhankar Pal, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael Bedford Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski:
A 7.3 M Output Non-Zeros/J, 11.7 M Output Non-Zeros/GB Reconfigurable Sparse Matrix-Matrix Multiplication Accelerator. IEEE J. Solid State Circuits 55(4): 933-944 (2020) - [j82]Deepak Kadetotad, Shihui Yin, Visar Berisha, Chaitali Chakrabarti, Jae-sun Seo:
An 8.93 TOPS/W LSTM Recurrent Neural Network Accelerator Featuring Hierarchical Coarse-Grain Sparsity for On-Device Speech Recognition. IEEE J. Solid State Circuits 55(7): 1877-1887 (2020) - [j81]Brendan L. West, Jian Zhou, Ronald G. Dreslinski, Oliver D. Kripfgans, J. Brian Fowlkes, Chaitali Chakrabarti, Thomas F. Wenisch:
Tetris: Using Software/Hardware Co-Design to Enable Handheld, Physics-Limited 3D Plane-Wave Ultrasound Imaging. IEEE Trans. Computers 69(8): 1209-1220 (2020) - [j80]Jian Zhou, Antonia Papandreou-Suppappola, Chaitali Chakrabarti:
Parallel Gibbs Sampler for Wavelet-Based Bayesian Compressive Sensing with High Reconstruction Accuracy. J. Signal Process. Syst. 92(10): 1101-1114 (2020) - [c156]Subhankar Pal, Siying Feng, Dong-Hyeon Park, Sung Kim, Aporva Amarnath, Chi-Sheng Yang, Xin He, Jonathan Beaumont, Kyle May, Yan Xiong, Kuba Kaszyk, John Magnus Morton, Jiawen Sun, Michael F. P. O'Boyle, Murray Cole, Chaitali Chakrabarti, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski:
Transmuter: Bridging the Efficiency Gap using Memory and Dataflow Reconfiguration. PACT 2020: 175-190 - [c155]Zhezhi He, Adnan Siraj Rakin, Jingtao Li, Chaitali Chakrabarti, Deliang Fan:
Defending and Harnessing the Bit-Flip Based Adversarial Weight Attack. CVPR 2020: 14083-14091 - [c154]Jingtao Li, Adnan Siraj Rakin, Yan Xiong, Liangliang Chang, Zhezhi He, Deliang Fan, Chaitali Chakrabarti:
Defending Bit-Flip Attack through DNN Weight Reconstruction. DAC 2020: 1-6 - [c153]A. Soorishetty, Jian Zhou, Subhankar Pal, David T. Blaauw, H. Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti:
Accelerating Linear Algebra Kernels on a Massively Parallel Reconfigurable Architecture. ICASSP 2020: 1558-1562 - [c152]Deepak Kadetotad, Jian Meng, Visar Berisha, Chaitali Chakrabarti, Jae-sun Seo:
Compressing LSTM Networks with Hierarchical Coarse-Grain Sparsity. INTERSPEECH 2020: 21-25 - [c151]Yan Xiong, Jian Zhou, Subhankar Pal, David T. Blaauw, Hun-Seok Kim, Trevor N. Mudge, Ronald G. Dreslinski, Chaitali Chakrabarti:
Accelerating Deep Neural Network Computation on a Low Power Reconfigurable Architecture. ISCAS 2020: 1-5 - [i4]Richard Uhrie, Chaitali Chakrabarti, John S. Brunhaver:
Automated Parallel Kernel Extraction from Dynamic Application Traces. CoRR abs/2001.09995 (2020) - [i3]Adnan Siraj Rakin, Zhezhi He, Jingtao Li, Fan Yao, Chaitali Chakrabarti, Deliang Fan:
T-BFA: Targeted Bit-Flip Adversarial Weight Attack. CoRR abs/2007.12336 (2020)
2010 – 2019
- 2019
- [j79]Ujjwal Gupta, Sumit K. Mandal, Manqing Mao, Chaitali Chakrabarti, Ümit Y. Ogras:
A Deep Q-Learning Approach for Dynamic Management of Heterogeneous Processors. IEEE Comput. Archit. Lett. 18(1): 14-17 (2019) - [j78]Mohit Shah, Ming Tu, Visar Berisha, Chaitali Chakrabarti, Andreas Spanias:
Articulation constrained learning with application to speech emotion recognition. EURASIP J. Audio Speech Music. Process. 2019: 14 (2019) - [j77]Manqing Mao, Xiaochen Peng, Rui Liu, Jingtao Li, Shimeng Yu, Chaitali Chakrabarti:
MAX2: An ReRAM-Based Neural Network Accelerator That Maximizes Data Reuse and Area Utilization. IEEE J. Emerg. Sel. Topics Circuits Syst. 9(2): 398-410 (2019) - [j76]Hsing Min Chen, Shin-Ying Lee, Trevor N. Mudge, Carole-Jean Wu, Chaitali Chakrabarti:
Configurable-ECC: Architecting a Flexible ECC Scheme to Support Different Sized Accesses in High Bandwidth Memory Systems. IEEE Trans. Computers 68(5): 646-659 (2019) - [j75]Ziyun Li, Jiang Xiang, Luyao Gong, David T. Blaauw, Chaitali Chakrabarti, Hun-Seok Kim:
Low Complexity, Hardware-Efficient Neighbor-Guided SGM Optical Flow for Low-Power Mobile Vision Applications. IEEE Trans. Circuits Syst. Video Technol. 29(7): 2191-2204 (2019) - [c150]Brendan L. West, Jian Zhou, Ronald G. Dreslinski, J. Brian Fowlkes, Oliver Kripfgans, Chaitali Chakrabarti, Thomas F. Wenisch:
Tetris: A Streaming Accelerator for Physics-Limited 3D Plane-Wave Ultrasound Imaging. DAC 2019: 189 - [c149]Deepak Kadetotad, Visar Berisha, Chaitali Chakrabarti, Jae-Sun Seo:
A 8.93-TOPS/W LSTM Recurrent Neural Network Accelerator Featuring Hierarchical Coarse-Grain Sparsity With All Parameters Stored On-Chip. ESSCIRC 2019: 119-122 - [c148]Gaurav Srivastava, Deepak Kadetotad, Shihui Yin, Visar Berisha, Chaitali Chakrabarti, Jae-sun Seo:
Joint Optimization of Quantization and Structured Sparsity for Compressed Deep Neural Networks. ICASSP 2019: 1393-1397 - [c147]Yan Xiong, Visar Berisha, Chaitali Chakrabarti:
Residual + Capsule Networks (ResCap) for Simultaneous Single-Channel Overlapped Keyword Recognition. INTERSPEECH 2019: 3337-3341 - [c146]Jingtao Li, Manqing Mao, Chaitali Chakrabarti:
Improving Reliability of ReRAM-Based DNN Implementation through Novel Weight Distribution. SiPS 2019: 189-194 - [c145]Subhankar Pal, Dong-Hyeon Park, Siying Feng, Paul Gao, Jielun Tan, Austin Rovinski, Shaolin Xie, Chun Zhao, Aporva Amarnath, Timothy Wesley, Jonathan Beaumont, Kuan-Yu Chen, Chaitali Chakrabarti, Michael B. Taylor, Trevor N. Mudge, David T. Blaauw, Hun-Seok Kim, Ronald G. Dreslinski:
A 7.3 M Output Non-Zeros/J Sparse Matrix-Matrix Multiplication Accelerator using Memory Reconfiguration in 40 nm. VLSI Circuits 2019: 150- - 2018
- [j74]Manqing Mao, Shimeng Yu, Chaitali Chakrabarti:
Design and Analysis of Energy-Efficient and Reliable 3-D ReRAM Cross-Point Array System. IEEE Trans. Very Large Scale Integr. Syst. 26(7): 1290-1300 (2018) - [j73]Mohit Shah, Sairam Arunachalam, Jingcheng Wang, David T. Blaauw, Dennis Sylvester, Hun-Seok Kim, Jae-sun Seo, Chaitali Chakrabarti:
A Fixed-Point Neural Network Architecture for Speech Applications on Resource Constrained Hardware. J. Signal Process. Syst. 90(5): 727-741 (2018) - [j72]Shunyao Wu, Chaitali Chakrabarti, Hyunseok Lee:
Reducing Energy of Baseband Processor for IoT Terminals with Long Range Wireless Communications. J. Signal Process. Syst. 90(10): 1345-1355 (2018) - [c144]Subhankar Pal, Jonathan Beaumont, Dong-Hyeon Park, Aporva Amarnath, Siying Feng, Chaitali Chakrabarti, Hun-Seok Kim, David T. Blaauw, Trevor N. Mudge, Ronald G. Dreslinski:
OuterSPACE: An Outer Product Based Sparse Matrix Multiplication Accelerator. HPCA 2018: 724-736 - [c143]Shihui Yin, Xiaoyu Sun, Shimeng Yu, Jae-sun Seo, Chaitali Chakrabarti:
A Parallel RRAM Synaptic Array Architecture for Energy-Efficient Recurrent Neural Networks. SiPS 2018: 13-18 - [c142]Jian Zhou, Chaitali Chakrabarti:
Parallel Wavelet-based Bayesian Compressive Sensing based on Gibbs Sampling. SiPS 2018: 140-145 - [c141]Manqing Mao, Xiaoyu Sun, Xiaochen Peng, Shimeng Yu, Chaitali Chakrabarti:
A Versatile ReRAM-based Accelerator for Convolutional Neural Networks. SiPS 2018: 211-216 - [i2]Shihui Yin, Gaurav Srivastava, Shreyas K. Venkataramanaiah, Chaitali Chakrabarti, Visar Berisha, Jae-sun Seo:
Minimizing Area and Energy of Deep Learning Hardware Design Using Collective Low Precision and Structured Compression. CoRR abs/1804.07370 (2018) - 2017
- [j71]Chengen Yang, Manqing Mao, Yu Cao, Chaitali Chakrabarti:
Cost-Effective Design Solutions for Enhancing PRAM Reliability and Performance. IEEE Trans. Multi Scale Comput. Syst. 3(1): 1-11 (2017) - [j70]Manqing Mao, Pai-Yu Chen, Shimeng Yu, Chaitali Chakrabarti:
A Multilayer Approach to Designing Energy-Efficient and Reliable ReRAM Cross-Point Array System. IEEE Trans. Very Large Scale Integr. Syst. 25(5): 1611-1621 (2017) - [c140]Shihui Yin, Gaurav Srivastava, Shreyas K. Venkataramanaiah, Chaitali Chakrabarti, Visar Berisha, Jae-sun Seo:
Minimizing area and energy of deep learning hardware design using collective low precision and structured compression. ACSSC 2017: 1907-1911 - [c139]Shunti Yin, Deepak Kadetotad, Bonan Yan, Chang Song, Yiran Chen, Chaitali Chakrabarti, Jae-sun Seo:
Low-power neuromorphic speech recognition engine with coarse-grain sparsity. ASP-DAC 2017: 111-114 - [c138]Shihui Yin, Shreyas K. Venkataramanaiah, Gregory K. Chen, Ram Krishnamurthy, Yu Cao, Chaitali Chakrabarti, Jae-sun Seo:
Algorithm and hardware design of discrete-time spiking neural networks based on back propagation with binary activations. BioCAS 2017: 1-5 - [c137]Ganapati Bhat, Sharanya Srinivas, Vamsi Chagari, Jaehyun Park, Thomas McGiffen, Hyunseok Lee, Daniel W. Bliss, Chaitali Chakrabarti, Ümit Y. Ogras:
Fluid wireless protocols: energy-efficient design and implementation. ESTIMedia 2017: 22-31 - [i1]Shihui Yin, Shreyas K. Venkataramanaiah, Gregory K. Chen, Ram Krishnamurthy, Yu Cao, Chaitali Chakrabarti, Jae-sun Seo:
Algorithm and Hardware Design of Discrete-Time Spiking Neural Networks Based on Back Propagation with Binary Activations. CoRR abs/1709.06206 (2017) - 2016
- [j69]Manqing Mao, Yu Cao, Shimeng Yu, Chaitali Chakrabarti:
Optimizing Latency, Energy, and Reliability of 1T1R ReRAM Through Cross-Layer Techniques. IEEE J. Emerg. Sel. Topics Circuits Syst. 6(3): 352-363 (2016) - [j68]Hsing Min Chen, Carole-Jean Wu, Trevor N. Mudge, Chaitali Chakrabarti:
RATT-ECC: Rate Adaptive Two-Tiered Error Correction Codes for Reliable 3D Die-Stacked Memory. ACM Trans. Archit. Code Optim. 13(3): 24:1-24:24 (2016) - [j67]Hsing Min Chen, Supreet Jeloka, Akhil Arunkumar, David T. Blaauw, Carole-Jean Wu, Trevor N. Mudge, Chaitali Chakrabarti:
Using Low Cost Erasure and Error Correction Schemes to Improve Reliability of Commodity DRAM Systems. IEEE Trans. Computers 65(12): 3766-3779 (2016) - [c136]Shunyao Wu, Sungmoon Kang, Chaitali Chakrabarti, Hyunseok Lee:
Low power baseband processor for IoT terminals with long range wireless communications. GlobalSIP 2016: 728-732 - [c135]Deepak Kadetotad, Sairam Arunachalam, Chaitali Chakrabarti, Jae-sun Seo:
Efficient memory compression in deep neural networks using coarse-grain sparsification for speech applications. ICCAD 2016: 78 - [c134]Jiang Xiang, Ziyun Li, David T. Blaauw, Hun-Seok Kim, Chaitali Chakrabarti:
Low complexity optical flow using neighbor-guided semi-global matching. ICIP 2016: 4483-4487 - [c133]Ayush Shrivastava, Pai-Yu Chen, Yu Cao, Shimeng Yu, Chaitali Chakrabarti:
Design of a reliable RRAM-based PUF for compact hardware security primitives. ISCAS 2016: 2326-2329 - [c132]Nilmini Abeyratne, Hsing Min Chen, Byoungchan Oh, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge:
Checkpointing Exascale Memory Systems with Existing Memory Technologies. MEMSYS 2016: 18-29 - [c131]Jiang Xiang, Ziyun Li, Hun-Seok Kim, Chaitali Chakrabarti:
Hardware-Efficient Neighbor-Guided SGM Optical Flow for Low Power Vision Applications. SiPS 2016: 1-6 - [c130]Jian Zhou, Siyuan Wei, Richard Sampson, Ming Yang, Rungroj Jintamethasawat, Oliver D. Kripfgans, J. Brian Fowlkes, Thomas F. Wenisch, Chaitali Chakrabarti:
Low Complexity 3D Ultrasound Imaging Using Synthetic Aperture Sequential Beamforming. SiPS 2016: 33-38 - 2015
- [j66]Mahesh K. Banavar, Jun Jason Zhang, Bhavana Chakraborty, Homin Kwon, Ying Li, Huaiguang Jiang, Andreas Spanias, Cihan Tepedelenlioglu, Chaitali Chakrabarti, Antonia Papandreou-Suppappola:
An overview of recent advances on distributed and agile sensing algorithms and implementation. Digit. Signal Process. 39: 1-14 (2015) - [j65]Mohit Shah, Chaitali Chakrabarti, Andreas Spanias:
Within and cross-corpus speech emotion recognition using latent topic model-based features. EURASIP J. Audio Speech Music. Process. 2015: 4 (2015) - [j64]Ming Yang, Richard Sampson, Siyuan Wei, Thomas F. Wenisch, Chaitali Chakrabarti:
Separable Beamforming For 3-D Medical Ultrasound Imaging. IEEE Trans. Signal Process. 63(2): 279-290 (2015) - [j63]Qi Zheng, Yajing Chen, Hyunseok Lee, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
Using Graphics Processing Units in an LTE Base Station. J. Signal Process. Syst. 78(1): 35-47 (2015) - [j62]Ming Yang, Richard Sampson, Siyuan Wei, Thomas F. Wenisch, Chaitali Chakrabarti:
High Frame Rate 3-D Ultrasound Imaging Using Separable Beamforming. J. Signal Process. Syst. 78(1): 73-84 (2015) - [c129]Pai-Yu Chen, Runchen Fang, Rui Liu, Chaitali Chakrabarti, Yu Cao, Shimeng Yu:
Exploiting resistive cross-point array for compact design of physical unclonable function. HOST 2015: 26-31 - [c128]Manqing Mao, Yu Cao, Shimeng Yu, Chaitali Chakrabarti:
Optimizing latency, energy, and reliability of 1T1R ReRAM through appropriate voltage settings. ICCD 2015: 359-366 - [c127]Hsing Min Chen, Akhil Arunkumar, Carole-Jean Wu, Trevor N. Mudge, Chaitali Chakrabarti:
E-ECC: Low Power Erasure and Error Correction Schemes for Increasing Reliability of Commodity DRAM Systems. MEMSYS 2015: 60-70 - [c126]Manqing Mao, Yu Cao, Shimeng Yu, Chaitali Chakrabarti:
Programming strategies to improve energy efficiency and reliability of ReRAM memory systems. SiPS 2015: 1-6 - [c125]Mohit Shah, Jingcheng Wang, David T. Blaauw, Dennis Sylvester, Hun-Seok Kim, Chaitali Chakrabarti:
A fixed-point neural network for keyword detection on resource constrained hardware. SiPS 2015: 1-6 - [c124]Siyuan Wei, Ming Yang, Richard Sampson, Oliver D. Kripfgans, J. Brian Fowlkes, Thomas F. Wenisch, Chaitali Chakrabarti:
Low cost clutter filter for 3D ultrasonic flow estimation. SiPS 2015: 1-6 - 2014
- [j61]Richard Sampson, Ming Yang, Siyuan Wei, Chaitali Chakrabarti, Thomas F. Wenisch:
Sonic Millip3De: An Architecture for Handheld 3D Ultrasound. IEEE Micro 34(3): 100-108 (2014) - [j60]Qian Xu, Srenivas Varadarajan, Chaitali Chakrabarti, Lina J. Karam:
A Distributed Canny Edge Detector: Algorithm and FPGA Implementation. IEEE Trans. Image Process. 23(7): 2944-2960 (2014) - [j59]Chengen Yang, Yunus Emre, Zihan Xu, Hsing Min Chen, Yu Cao, Chaitali Chakrabarti:
A Low Cost Multi-Tiered Approach to Improving the Reliability of Multi-Level Cell Pram. J. Signal Process. Syst. 76(2): 133-147 (2014) - [j58]Chengen Yang, Hsing Min Chen, Trevor N. Mudge, Chaitali Chakrabarti:
Improving the Reliability of MLC NAND Flash Memories Through Adaptive Data Refresh and Error Control Coding. J. Signal Process. Syst. 76(3): 225-234 (2014) - [c123]Johann Hauswald, Thomas Manville, Q. Zheng, Ronald G. Dreslinski, Chaitali Chakrabarti, Trevor N. Mudge:
A hybrid approach to offloading mobile image classification. ICASSP 2014: 8375-8379 - [c122]Mohit Shah, Chaitali Chakrabarti, Andreas Spanias:
A multi-modal approach to emotion recognition using undirected topic models. ISCAS 2014: 754-757 - [c121]Madhu Vasudevan, Chaitali Chakrabarti:
Image processing using approximate datapath units. ISCAS 2014: 1544-1547 - [c120]Siyuan Wei, Ming Yang, Chaitali Chakrabarti, Richard Sampson, Thomas F. Wenisch, Oliver Kripfgans, J. Brian Fowlkes:
A low complexity scheme for accurate 3D velocity estimation in ultrasound systems. SiPS 2014: 85-90 - [c119]Manqing Mao, Chengen Yang, Zihan Xu, Yu Cao, Chaitali Chakrabarti:
Low cost ECC schemes for improving the reliability of DRAM+PRAMMAIN memory systems. SiPS 2014: 139-144 - 2013
- [j57]Yunus Emre, Chaitali Chakrabarti:
Energy and Quality-Aware Multimedia Signal Processing. IEEE Trans. Multim. 15(7): 1579-1593 (2013) - [j56]Lifeng Miao, Jun Jason Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola:
Efficient Bayesian Tracking of Multiple Sources of Neural Activity: Algorithms and Real-Time FPGA Implementation. IEEE Trans. Signal Process. 61(3): 633-647 (2013) - [j55]Yunus Emre, Chaitali Chakrabarti:
Techniques for Compensating Memory Errors in JPEG2000. IEEE Trans. Very Large Scale Integr. Syst. 21(1): 159-163 (2013) - [j54]Lifeng Miao, Stefanos Michael, Narayan Kovvali, Chaitali Chakrabarti, Antonia Papandreou-Suppappola:
Multi-source Neural Activity Estimation and Sensor Scheduling: Algorithms and Hardware Implementation. J. Signal Process. Syst. 70(2): 145-162 (2013) - [j53]Ahmed Al-Maashri, Matthew Cotter, Nandhini Chandramoorthy, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
Hardware Acceleration for Neuromorphic Vision Algorithms. J. Signal Process. Syst. 70(2): 163-175 (2013) - [c118]Zihan Xu, Ketul Sutaria, Chengen Yang, Chaitali Chakrabarti, Yu Cao:
Compact modeling of STT-MTJ for SPICE simulation. ESSDERC 2013: 338-341 - [c117]Richard Sampson, Ming Yang, Siyuan Wei, Chaitali Chakrabarti, Thomas F. Wenisch:
Sonic Millip3De: A massively parallel 3D-stacked accelerator for 3D ultrasound. HPCA 2013: 318-329 - [c116]Chengen Yang, Deepak Muckatira, Aditya Kulkarni, Chaitali Chakrabarti:
Data storage time sensitive ECC schemes for MLC NAND Flash memories. ICASSP 2013: 2513-2517 - [c115]Mohit Shah, Lifeng Miao, Chaitali Chakrabarti, Andreas Spanias:
A speech emotion recognition framework based on latent Dirichlet allocation: Algorithm and FPGA implementation. ICASSP 2013: 2553-2557 - [c114]Qi Zheng, Yajing Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
WiBench: An open source kernel suite for benchmarking wireless systems. IISWC 2013: 123-132 - [c113]Qi Zheng, Yen-Po Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
Parallelization techniques for implementing trellis algorithms on graphics processors. ISCAS 2013: 1220-1223 - [c112]Bharan Giridhar, Michael Cieslak, Deepankar Duggal, Ronald G. Dreslinski, Hsing Min Chen, Robert Patti, Betina Hold, Chaitali Chakrabarti, Trevor N. Mudge, David T. Blaauw:
Exploring DRAM organizations for energy-efficient and resilient exascale memories. SC 2013: 23:1-23:12 - [c111]Lifeng Miao, Chaitali Chakrabarti:
A parallel stochastic computing system with improved accuracy. SiPS 2013: 195-200 - [c110]Ming Yang, Richard Sampson, Thomas F. Wenisch, Chaitali Chakrabarti:
Separable beamforming for 3-D synthetic aperture ultrasound imaging. SiPS 2013: 207-212 - [c109]Qi Zheng, Yen-Po Chen, Ronald G. Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott A. Mahlke, Trevor N. Mudge:
Architecting an LTE base station with graphics processing units. SiPS 2013: 219-224 - 2012
- [j52]Chengen Yang, Yunus Emre, Yu Cao, Chaitali Chakrabarti:
Improving reliability of non-volatile memory technologies through circuit level techniques and error control coding. EURASIP J. Adv. Signal Process. 2012: 211 (2012) - [j51]Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester:
A Super-Pipelined Energy Efficient Subthreshold 240 MS/s FFT Core in 65 nm CMOS. IEEE J. Solid State Circuits 47(1): 23-34 (2012) - [j50]Chengen Yang, Yunus Emre, Chaitali Chakrabarti:
Product Code Schemes for Error Correction in MLC NAND Flash Memories. IEEE Trans. Very Large Scale Integr. Syst. 20(12): 2302-2314 (2012) - [j49]Qi Qi, Chaitali Chakrabarti:
Parallel High Throughput Soft-Output Sphere Decoding Algorithm. J. Signal Process. Syst. 68(2): 217-231 (2012) - [j48]Yunus Emre, Chaitali Chakrabarti:
Quality-Aware Techniques for Reducing Power of JPEG Codecs. J. Signal Process. Syst. 69(3): 227-237 (2012) - [c108]Alexander Maurer, Lifeng Miao, Jun Jason Zhang, Narayan Kovvali, Antonia Papandreou-Suppappola, Chaitali Chakrabarti:
EEG/MEG artifact suppression for improved neural activity estimation. ACSCC 2012: 1646-1650 - [c107]Ahmed Al-Maashri, Michael DeBole, Matthew Cotter, Nandhini Chandramoorthy, Yang Xiao, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
Accelerating neuromorphic vision algorithms for recognition. DAC 2012: 579-584 - [c106]Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Yongjun Park, Chaitali Chakrabarti, Scott A. Mahlke, David T. Blaauw, Trevor N. Mudge:
Process variation in near-threshold wide SIMD architectures. DAC 2012: 980-987 - [c105]Mohit Shah, Brian Mears, Chaitali Chakrabarti, Andreas Spanias:
Lifelogging: Archival and retrieval of continuously recorded audio using wearable devices. ESPA 2012: 99-102 - [c104]Lifeng Miao, Jun Jason Zhang, Antonia Papandreou-Suppappola, Chaitali Chakrabarti:
Neural activity tracking using spatial compressive particle filtering. ICASSP 2012: 3461-3464 - [c103]Zihan Xu, Ketul Sutaria, Chengen Yang, Chaitali Chakrabarti, Yu Cao:
Hierarchical modeling of Phase Change memory for reliable design. ICCD 2012: 115-120 - [c102]Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester:
Extending energy-saving voltage scaling in ultra low voltage integrated circuit designs. ICICDT 2012: 1-4 - [c101]Ming Yang, Chaitali Chakrabarti:
Design of orthogonal coded excitation for synthetic aperture imaging in ultrasound systems. ISCAS 2012: 113-116 - [c100]Chi-Li Yu, Chaitali Chakrabarti:
Transpose-free SAR imaging on FPGA platform. ISCAS 2012: 762-765 - [c99]Mohit Shah, Brian Mears, Chaitali Chakrabarti, Andreas Spanias:
A top-down design methodology using virtual platforms for concept development. ISQED 2012: 444-450 - [c98]Samatha Gummalla, Anupama R. Subramaniam, Yu Cao, Chaitali Chakrabarti:
An analytical approach to efficient circuit variability analysis in scaled CMOS design. ISQED 2012: 641-647 - [c97]Chengen Yang, Yunus Emre, Yu Cao, Chaitali Chakrabarti:
Multi-Tiered Approach to Improving the Reliability of Multi-Level Cell PRAM. SiPS 2012: 114-119 - [c96]Yunus Emre, Chengen Yang, Ketul Sutaria, Yu Cao, Chaitali Chakrabarti:
Enhancing the Reliability of STT-RAM through Circuit and System Level Techniques. SiPS 2012: 125-130 - [c95]Ming Yang, Siyuan Wei, Chaitali Chakrabarti:
Reducing the Complexity of Orthogonal Code Based Synthetic Aperture Ultrasound System. SiPS 2012: 270-275 - 2011
- [j47]Chi-Li Yu, Kevin M. Irick, Chaitali Chakrabarti, Vijaykrishnan Narayanan:
Multidimensional DFT IP Generator for FPGA Platforms. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(4): 755-764 (2011) - [j46]Lanping Deng, Kanwaldeep Sobti, Yuanrui Zhang, Chaitali Chakrabarti:
Accurate Area, Time and Power Models for FPGA-Based Implementations. J. Signal Process. Syst. 63(1): 39-50 (2011) - [j45]Chi-Li Yu, Jungsub Kim, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
FPGA Architecture for 2D Discrete Fourier Transform Based on 2D Decomposition for Large-sized Data. J. Signal Process. Syst. 64(1): 109-122 (2011) - [j44]Lifeng Miao, Jun Jason Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola:
Algorithm and Parallel Implementation of Particle Filtering and its Use in Waveform-Agile Sensing. J. Signal Process. Syst. 65(2): 211-227 (2011) - [c94]Michael DeBole, Yang Xiao, Chi-Li Yu, Ahmed Al-Maashri, Matthew Cotter, Chaitali Chakrabarti, Vijaykrishnan Narayanan:
FPGA-accelerator system for computing biologically inspired feature extraction models. ACSCC 2011: 751-755 - [c93]Yunus Emre, Chaitali Chakrabarti:
Low energy motion estimation via selective aproximations. ASAP 2011: 176-183 - [c92]Srinidhi Kestur, Kevin M. Irick, Sungho Park, Ahmed Al-Maashri, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
An algorithm-architecture co-design framework for gridding reconstruction using FPGAs. DAC 2011: 585-590 - [c91]Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester:
Pipeline strategy for improving optimal energy efficiency in ultra-low voltage design. DAC 2011: 990-995 - [c90]Yunus Emre, Chaitali Chakrabarti:
Data-path and memory error compensation technique for low power JPEG implementation. ICASSP 2011: 1589-1592 - [c89]Dongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester:
Energy-optimized high performance FFT processor. ICASSP 2011: 1701-1704 - [c88]Michael DeBole, Ahmed Al-Maashri, Matthew Cotter, Chi-Li Yu, Chaitali Chakrabarti, Vijaykrishnan Narayanan:
A framework for accelerating neuromorphic-vision algorithms on FPGAs. ICCAD 2011: 810-813 - [c87]Mingoo Seok, Dongsuk Jeon, Chaitali Chakrabarti, David T. Blaauw, Dennis Sylvester:
A 0.27V 30MHz 17.7nJ/transform 1024-pt complex FFT core with super-pipelining. ISSCC 2011: 342-344 - [c86]Chengen Yang, Yunus Emre, Chaitali Chakrabarti, Trevor N. Mudge:
Flexible product code-based ECC schemes for MLC NAND Flash memories. SiPS 2011: 255-260 - [c85]Ahmed Al-Maashri, Michael DeBole, Chi-Li Yu, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
A hardware architecture for accelerating neuromorphic vision algorithms. SiPS 2011: 355-360 - [c84]Lifeng Miao, Jun Jason Zhang, Chaitali Chakrabarti, Antonia Papandreou-Suppappola, Narayan Kovvali:
Real-time closed-loop tracking of an unknown number of neural sources using probability hypothesis density particle filtering. SiPS 2011: 367-372 - [c83]Aarul Jain, Aviral Shrivastava, Chaitali Chakrabarti:
LA-LRU: A Latency-Aware Replacement Policy for Variation Tolerant Caches. VLSI Design 2011: 298-303 - 2010
- [j43]Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti:
Mobile Supercomputers for the Next-Generation Cell Phone. Computer 43(1): 81-85 (2010) - [j42]Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner:
AnySP: Anytime Anywhere Anyway Signal Processing. IEEE Micro 30(1): 81-91 (2010) - [j41]Hyunseok Lee, Chaitali Chakrabarti, Trevor N. Mudge:
A Low-Power DSP for Wireless Communications. IEEE Trans. Very Large Scale Integr. Syst. 18(9): 1310-1322 (2010) - [c82]Yuanrui Zhang, Lanping Deng, Praveen Yedlapalli, Sai Prashanth Muralidhara, Hui Zhao, Mahmut T. Kandemir, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun:
A special-purpose compiler for look-up table and code generation for function evaluation. DATE 2010: 1130-1135 - [c81]Srenivas Varadarajan, Chaitali Chakrabarti, Lina J. Karam, Judit Martinez Bauza:
A distributed psycho-visually motivated Canny edge detector. ICASSP 2010: 822-825 - [c80]Chi-Li Yu, Chaitali Chakrabarti, Sungho Park, Vijaykrishnan Narayanan:
Bandwidth-intensive FPGA architecture for multi-dimensional DFT. ICASSP 2010: 1486-1489 - [c79]Yunus Emre, Chaitali Chakrabarti:
Energy-aware adaptive OFDM systems. ICASSP 2010: 1590-1593 - [c78]Sangwon Seo, Ronald G. Dreslinski, Mark Woh, Chaitali Chakrabarti, Scott A. Mahlke, Trevor N. Mudge:
Diet SODA: a power-efficient processor for digital cameras. ISLPED 2010: 79-84
2000 – 2009
- 2009
- [j40]Jungsub Kim, Lanping Deng, Prasanth Mangalagiri, Kevin M. Irick, Kanwaldeep Sobti, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun:
An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization. IEEE Trans. Computers 58(12): 1654-1667 (2009) - [j39]Nilanjan Banerjee, Georgios Karakonstantis, Jung Hwan Choi, Chaitali Chakrabarti, Kaushik Roy:
Design Methodology for Low Power and Parametric Robustness Through Output-Quality Modulation: Application to Color-Interpolation Filtering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(8): 1127-1137 (2009) - [j38]Yuming Zhu, Chaitali Chakrabarti:
Architecture-aware LDPC code design for multiprocessor software defined radio systems. IEEE Trans. Signal Process. 57(9): 3679-3692 (2009) - [j37]Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, Naehyuck Chang, Sarma B. K. Vrudhula:
Maximizing the Lifetime of Embedded Systems Powered by Fuel Cell-Battery Hybrids. IEEE Trans. Very Large Scale Integr. Syst. 17(1): 22-32 (2009) - [j36]Ye Li, Martin Reisslein, Chaitali Chakrabarti:
Energy-Efficient Video Transmission Over a Wireless Link. IEEE Trans. Veh. Technol. 58(3): 1229-1244 (2009) - [c77]Veera Papirla, Chaitali Chakrabarti:
Energy-aware error control coding for Flash memories. DAC 2009: 658-663 - [c76]Niranjan D. Narvekar, Bharatan Konnanath, Shalin M. Mehta, Santosh Chintalapati, Ismail AlKamal, Chaitali Chakrabarti, Lina J. Karam:
An H.264/SVC memory architecture supporting spatial and course-grained quality scalabilities. ICIP 2009: 2661-2664 - [c75]Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner:
AnySP: anytime anywhere anyway signal processing. ISCA 2009: 128-139 - [c74]Veera Papirla, Aarul Jain, Chaitali Chakrabarti:
Low power robust signal processing. ISLPED 2009: 303-306 - [c73]Sangwon Seo, Mark Woh, Scott A. Mahlke, Trevor N. Mudge, Sunfaram Vijay, Chaitali Chakrabarti:
Customizing wide-SIMD architectures for H.264. ICSAMOS 2009: 172-179 - [c72]Jungsub Kim, Chi-Li Yu, Lanping Deng, Srinidhi Kestur, Vijaykrishnan Narayanan, Chaitali Chakrabarti:
FPGA architecture for 2D Discrete Fourier Transform based on 2D decomposition for large-sized data. SiPS 2009: 121-126 - 2008
- [j35]Jianli Zhuo, Chaitali Chakrabarti:
Energy-efficient dynamic task scheduling algorithms for DVS systems. ACM Trans. Embed. Comput. Syst. 7(2): 17:1-17:25 (2008) - [j34]Kyungsoo Lee, Naehyuck Chang, Jianli Zhuo, Chaitali Chakrabarti, Sudheendra Kadri, Sarma B. K. Vrudhula:
A fuel-cell-battery hybrid for portable embedded systems. ACM Trans. Design Autom. Electr. Syst. 13(1): 19:1-19:34 (2008) - [c71]Lanping Deng, Kanwaldeep Sobti, Chaitali Chakrabarti:
Accurate models for estimating area and power of FPGA implementations. ICASSP 2008: 1417-1420 - [c70]Younghyun Kim, Youngjin Cho, Naehyuck Chang, Chaitali Chakrabarti, Nam Ik Cho:
Extending the lifetime of media recorders constrained by battery and flash memory size. ISLPED 2008: 159-164 - [c69]Mark Woh, Yuan Lin, Sangwon Seo, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Richard Bruce, Danny Kershaw, Alastair Reid, Mladen Wilder, Krisztián Flautner:
From SODA to scotch: The evolution of a wireless baseband processor. MICRO 2008: 152-163 - [c68]Yuan Lin, Yoonseo Choi, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti:
A parameterized dataflow language extension for embedded streaming systems. ICSAMOS 2008: 10-17 - [c67]Lanping Deng, Chi-Li Yu, Chaitali Chakrabarti, Jungsub Kim, Vijaykrishnan Narayanan:
Efficient image reconstruction using partial 2D Fourier transform. SiPS 2008: 49-54 - [c66]Bhavana B. Manjunath, Aaron S. Williams, Chaitali Chakrabarti, Antonia Papandreou-Suppappola:
Efficient mapping of advanced signal processing algorithms on multi-processor architectures. SiPS 2008: 269-274 - 2007
- [j33]Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner:
SODA: A High-Performance DSP Architecture for Software-Defined Radio. IEEE Micro 27(1): 114-123 (2007) - [j32]Ye Li, Bertan Bakkaloglu, Chaitali Chakrabarti:
A System Level Energy Model and Energy-Quality Evaluation for Integrated Transceiver Front-Ends. IEEE Trans. Very Large Scale Integr. Syst. 15(1): 90-103 (2007) - [j31]Sung-Hoon Oh, Hang Song, James T. Aberle, Bertan Bakkaloglu, Chaitali Chakrabarti:
Automatic antenna-tuning unit for software-defined and cognitive radio. Wirel. Commun. Mob. Comput. 7(9): 1103-1115 (2007) - [c65]Jianli Zhuo, Chaitali Chakrabarti, Kyungsoo Lee, Naehyuck Chang:
Dynamic Power Management with Hybrid Power Sources. DAC 2007: 871-876 - [c64]Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun:
TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platforms. FPL 2007: 68-73 - [c63]Yuming Zhu, Chaitali Chakrabarti:
Memory Efficient LDPC Code Design for High Throughput Software Defined Radio (SDR) systems. ICASSP (2) 2007: 9-12 - [c62]Georgios Karakonstantis, Nilanjan Banerjee, Kaushik Roy, Chaitali Chakrabarti:
Design methodology to trade off power, output quality and error resiliency: application to color interpolation filtering. ICCAD 2007: 199-204 - [c61]Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti:
Throughput of multi-core processors under thermal constraints. ISLPED 2007: 201-206 - [c60]Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang:
Energy management of DVS-DPM enabled embedded systems powered by fuel cell-battery hybrid source. ISLPED 2007: 322-327 - [c59]Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner:
The Next Generation Challenge for Software Defined Radio. SAMOS 2007: 343-354 - [c58]Qi Qi, Chaitali Chakrabarti:
Sphere Decoding for Multiprocessor Architectures. SiPS 2007: 50-55 - [c57]Sangwon Seo, Trevor N. Mudge, Yuming Zhu, Chaitali Chakrabarti:
Design and Analysis of LDPC Decoders for Software Defined Radio. SiPS 2007: 210-215 - [c56]Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun, Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan:
Efficient Function Evaluations with Lookup Tables for Structured Matrix Operations. SiPS 2007: 463-468 - 2006
- [j30]Rahim Khoja, Mehul Marolia, Tinku Acharya, Chaitali Chakrabarti:
A coprocessor architecture for fast protein structure prediction. Pattern Recognit. 39(12): 2494-2505 (2006) - [j29]Yuming Zhu, L. Li, Chaitali Chakrabarti:
Study of energy and performance of space-time decoding systems in concatenation with turbo decoding. IEEE Trans. Very Large Scale Integr. Syst. 14(1): 86-90 (2006) - [j28]Tinku Acharya, Chaitali Chakrabarti:
A Survey on Lifting-based Discrete Wavelet Transform Architectures. J. VLSI Signal Process. 42(3): 321-339 (2006) - [c55]Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang, Sarma B. K. Vrudhula:
Extending the lifetime of fuel cell based hybrid systems. DAC 2006: 562-567 - [c54]Youngjin Cho, Naehyuck Chang, Chaitali Chakrabarti, Sarma B. K. Vrudhula:
High-level power management of embedded systems with application-specific energy cost functions. DAC 2006: 568-573 - [c53]Yuming Zhu, Chaitali Chakrabarti:
Aggregated Circulant Matrix Based LDPC Codes. ICASSP (3) 2006: 916-919 - [c52]Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner:
SODA: A Low-power Architecture For Software Radio. ISCA 2006: 89-101 - [c51]Hyunseok Lee, Trevor N. Mudge, Chaitali Chakrabarti:
Reducing idle mode power in software defined radio terminals. ISLPED 2006: 101-106 - [c50]Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti, Naehyuck Chang:
An optimal analytical solution for processor speed control with thermal constraints. ISLPED 2006: 292-297 - [c49]Jianli Zhuo, Chaitali Chakrabarti, Naehyuck Chang, Sarma B. K. Vrudhula:
Maximizing the lifetime of embedded systems powered by fuel cell-battery hybrids. ISLPED 2006: 424-429 - [c48]Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Alastair Reid, Krisztián Flautner:
Design and Implementation of Turbo Decoders for Software Defined Radio. SiPS 2006: 22-27 - [c47]Yuming Zhu, Chaitali Chakrabarti:
Architecture-Aware LDPC Code Design for Software Defined Radio. SiPS 2006: 405-410 - [c46]G. Chen, Liping Xue, Jungsub Kim, Kanwaldeep Sobti, Lanping Deng, Xiaobai Sun, Nikos Pitsianis, Chaitali Chakrabarti, Mahmut T. Kandemir, Narayanan Vijaykrishnan:
Geometric Tiling for Reducing Power Consumption in Structured Matrix Operations. SoCC 2006: 113-114 - 2005
- [j27]Hafijur Rahman, Chaitali Chakrabarti:
An Efficient Control Point Insertion Technique for Leakage Reduction of Scaled CMOS Circuits. IEEE Trans. Circuits Syst. II Express Briefs 52-II(8): 496-500 (2005) - [j26]Princey Chowdhury, Chaitali Chakrabarti:
Static task-scheduling algorithms for battery-powered DVS systems. IEEE Trans. Very Large Scale Integr. Syst. 13(2): 226-237 (2005) - [j25]Mayank Tiwari, Yuming Zhu, Chaitali Chakrabarti:
Memory sub-banking scheme for high throughput MAP-based SISO decoders. IEEE Trans. Very Large Scale Integr. Syst. 13(4): 494-498 (2005) - [c45]Amit S. Chhetri, Darryl Morrell, Antonia Papandreou-Suppappola, Chaitali Chakrabarti, Andreas Spanias, Jun Jason Zhang:
A Unified Bayesian Decision Theory Perspective to Sensor Networks. ISIC 2005: 598-603 - [c44]Jianli Zhuo, Chaitali Chakrabarti:
An efficient dynamic task scheduling algorithm for battery powered DVS systems. ASP-DAC 2005: 846-849 - [c43]Jianli Zhuo, Chaitali Chakrabarti:
System-level energy-efficient dynamic task scheduling. DAC 2005: 628-631 - 2004
- [j24]Todd M. Austin, David T. Blaauw, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Wayne H. Wolf:
Mobile Supercomputers. Computer 37(5): 81-83 (2004) - [j23]Wen-Tsong Shiue, Chaitali Chakrabarti:
Multi-Module Multi-Port Memory Design for Low Power Embedded Systems. Des. Autom. Embed. Syst. 9(4): 235-261 (2004) - [j22]Russell E. Henning, Chaitali Chakrabarti:
An approach for adaptively approximating the Viterbi algorithm to reduce power consumption while decoding convolutional codes. IEEE Trans. Signal Process. 52(5): 1443-1451 (2004) - [j21]J. Kaza, Chaitali Chakrabarti:
Design and implementation of low-energy turbo decoders. IEEE Trans. Very Large Scale Integr. Syst. 12(9): 968-977 (2004) - [c42]Mayank Tiwari, Yuming Zhu, Chaitali Chakrabarti:
Memory sub-banking scheme for high throughput turbo decoder. ICASSP (5) 2004: 29-32 - [c41]Hafijur Rahman, Chaitali Chakrabarti:
A leakage estimation and reduction technique for scaled CMOS logic circuits considering gate-leakage. ISCAS (2) 2004: 297-300 - [c40]Sumant Bhutoria, Chaitali Chakrabarti:
Parameterized SoC design for portable systems. ISCAS (2) 2004: 449-452 - [c39]Jameel Ahmed, Chaitali Chakrabarti:
A dynamic task scheduling algorithm for battery powered DVS systems. ISCAS (2) 2004: 813-816 - [c38]Ali Manzak, Chaitali Chakrabarti:
Optimum Buffer Size for Dynamic Voltage Processors. PATMOS 2004: 711-721 - 2003
- [j20]Kishore Andra, Chaitali Chakrabarti, Tinku Acharya:
A high-performance JPEG2000 architecture. IEEE Trans. Circuits Syst. Video Technol. 13(3): 209-218 (2003) - [j19]Ali Manzak, Chaitali Chakrabarti:
Variable voltage task scheduling algorithms for minimizing energy/power. IEEE Trans. Very Large Scale Integr. Syst. 11(2): 270-276 (2003) - 2002
- [j18]Kishore Andra, Chaitali Chakrabarti, Tinku Acharya:
A VLSI architecture for lifting-based forward and inverse wavelet transform. IEEE Trans. Signal Process. 50(4): 966-977 (2002) - [j17]Ali Manzak, Chaitali Chakrabarti:
A low power scheduling scheme with resources operating at multiple voltages. IEEE Trans. Very Large Scale Integr. Syst. 10(1): 6-14 (2002) - [c37]Daler N. Rakhmatov, Sarma B. K. Vrudhula, Chaitali Chakrabarti:
Battery-conscious task sequencing for portable devices including voltage/clock scaling. DAC 2002: 189-194 - [c36]Jagadeesh Kaza, Chaitali Chakrabarti:
Energy-efficient turbo decoder. ICASSP 2002: 3093-3096 - [c35]S. H. Tadas, Chaitali Chakrabarti:
Architectural approaches to reduce leakage energy in caches. ISCAS (1) 2002: 481-484 - [c34]Kishore Andra, Chaitali Chakrabarti, Tinku Acharya:
A high performance JPEG2000 architecture. ISCAS (1) 2002: 765-768 - [c33]Russell E. Henning, Chaitali Chakrabarti:
Low-power approach for decoding convolutional codes with adaptive viterbi algorithm approximations. ISLPED 2002: 68-71 - 2001
- [j16]Wen-Tsong Shiue, Sathishkumar Udayanarayanan, Chaitali Chakrabarti:
Data memory design and exploration for low-power embedded systems. ACM Trans. Design Autom. Electr. Syst. 6(4): 553-568 (2001) - [c32]Sathishkumar Udayanarayanan, Chaitali Chakrabarti:
Address Code Generation for Digital Signal Processors. DAC 2001: 353-358 - [c31]Kishore Andra, Chaitali Chakrabarti, Tinku Acharya:
Efficient implementation of a set of lifting based wavelet filters. ICASSP 2001: 1101-1104 - [c30]Russell E. Henning, Chaitali Chakrabarti:
An approach for enabling DCT/IDCT energy reduction scalability in MPEG-2 video codecs. ICASSP 2001: 1209-1212 - [c29]Ali Manzak, Chaitali Chakrabarti:
Voltage Scaling for Energy Minimization with QoS Constraints. ICCD 2001: 438-446 - [c28]Ali Manzak, Chaitali Chakrabarti:
Variable voltage task scheduling algorithms for minimizing energy. ISLPED 2001: 279-282 - 2000
- [j15]Chaitali Chakrabarti, Lori E. Lucke:
VLSI architectures for weighted order statistic (WOS) filters. Signal Process. 80(8): 1419-1433 (2000) - [c27]Ali Manzak, Chaitali Chakrabarti:
Variable voltage task scheduling for minimizing energy or minimizing power. ICASSP 2000: 3239-3242 - [c26]Kishore Andra, Tinku Acharya, Chaitali Chakrabarti:
A Multi-Bit Binary Arithmetic Coding Technique. ICIP 2000: 928-931 - [c25]Wen-Tsong Shiue, Chaitali Chakrabarti:
ILP-based scheme for low power scheduling and resource binding. ISCAS 2000: 279-282 - [c24]Sukumar S. Raghuram, Chaitali Chakrabarti:
A programmable processor for cryptography. ISCAS 2000: 685-688 - [c23]Sathishkumar Udayanarayanan, Chaitali Chakrabarti:
Energy-efficient code generation for DSP56000 family (poster session). ISLPED 2000: 247-249 - [c22]Russell E. Henning, Chaitali Chakrabarti:
Relating Data Characteristics to Transition Activity in High-Level Static CMOS Design. VLSI Design 2000: 38-43
1990 – 1999
- 1999
- [j14]Chaitali Chakrabarti, Clint Mumford:
Efficient realizations of encoders and decoders based on the 2-D discrete wavelet transform. IEEE Trans. Very Large Scale Integr. Syst. 7(3): 289-298 (1999) - [c21]Wen-Tsong Shiue, Chaitali Chakrabarti:
Memory Exploration for Low Power, Embedded Systems. DAC 1999: 140-145 - [c20]Russell E. Henning, Chaitali Chakrabarti:
Activity models for use in low power, high-level synthesis. ICASSP 1999: 1881-1884 - [c19]Chaitali Chakrabarti, Dinesh Gaitonde:
Instruction level power model of microcontrollers. ISCAS (1) 1999: 76-79 - [c18]Chaitali Chakrabarti:
A DWT-based encoder architecture for symmetrically extended images. ISCAS (4) 1999: 123-126 - [c17]Wen-Tsong Shiue, Chaitali Chakrabarti:
Memory exploration for low power embedded systems. ISCAS (1) 1999: 250-253 - [c16]Ali Manzak, Chaitali Chakrabarti:
A low power scheduling scheme with resources operating at multiple voltages. ISCAS (1) 1999: 354-357 - 1997
- [c15]Russell E. Henning, Chaitali Chakrabarti:
High-Level Design Synthesis of a Low Power, VLIW Processor for the IS-54 VSELP Speech Encoder. ICCD 1997: 571-576 - 1996
- [j13]Hsiang-Ling Li, Chaitali Chakrabarti:
Motion estimation of two-dimensional objects based on the straight line hough transform: A new approach. Pattern Recognit. 29(8): 1245-1258 (1996) - [j12]Hsiang-Ling Li, Chaitali Chakrabarti:
A new architecture for the Viterbi decoder for code rate k/n. IEEE Trans. Commun. 44(2): 158-164 (1996) - [j11]Chaitali Chakrabarti, Mohan Vishwanath, Robert Michael Owens:
Architectures for wavelet transforms: A survey. J. VLSI Signal Process. 14(2): 171-192 (1996) - [c14]Chaitali Chakrabarti, Clint Mumford:
Efficient realizations of analysis and synthesis filters based on the 2-D discrete wavelet transform. ICASSP 1996: 3256-3259 - 1995
- [j10]Hsiang-Ling Li, Chaitali Chakrabarti:
A New Architecture for the Viterbi Decoder for Code Rate k/n1. IEEE Trans. Commun. 43(12): 3101 (1995) - [j9]Gagan Gupta, Chaitali Chakrabarti:
Architectures for hierarchical and other block matching algorithms. IEEE Trans. Circuits Syst. Video Technol. 5(6): 477-489 (1995) - [j8]Lori Lucke, Chaitali Chakrabarti:
A digit-serial architecture for gray-scale morphological filtering. IEEE Trans. Image Process. 4(3): 387-391 (1995) - [j7]Chaitali Chakrabarti, Mohan Vishwanath:
Efficient realizations of the discrete and continuous wavelet transforms: from single chip implementations to mappings on SIMD array computers. IEEE Trans. Signal Process. 43(3): 759-771 (1995) - [c13]Hsiang-Ling Li, Chaitali Chakrabarti:
A new Viterbi decoder design for code rate k/n. ICASSP 1995: 2743-2746 - [c12]Chaitali Chakrabarti, Mohan Vishwanath, Robert Michael Owens:
A survey of architectures for the discrete and continuous wavelet transforms. ICASSP 1995: 2849-2852 - [c11]Kala Srivatsan, Chaitali Chakrabarti, Lori Lucke:
Low power data format converter design using semi-static register allocation. ICCD 1995: 460-465 - [c10]Hsiang-Ling Li, Chaitali Chakrabarti:
A New Viterbi Decoder Design for Code Rate K/N. ISCAS 1995: 549-552 - 1994
- [j6]Chaitali Chakrabarti:
High sample rate array architectures for median filters. IEEE Trans. Signal Process. 42(3): 707-712 (1994) - [j5]Chaitali Chakrabarti:
A comment on 'on prime factor mapping for the discrete Hartley transform'. IEEE Trans. Signal Process. 42(6): 1551-1552 (1994) - [j4]Chaitali Chakrabarti, Li-Yu Wang:
Novel sorting network-based architectures for rank order filters. IEEE Trans. Very Large Scale Integr. Syst. 2(4): 502-507 (1994) - [c9]Mohan Vishwanath, Chaitali Chakrabarti:
A VLSI architecture for real-time hierarchical encoding/decoding of video using the wavelet transform. ICASSP (2) 1994: 401-404 - [c8]Chaitali Chakrabarti, Lori Lucke:
Efficient Architectures for Hidden Surface Removal. ICIP (1) 1994: 661-665 - [c7]Chaitali Chakrabarti, Li-Yu Wang:
Novel Sorting Netowrk-Based Architectures for Rank Order Filters. ISCAS 1994: 89-93 - [c6]Srikanth Karkada, Chaitali Chakrabarti, Andreas Spanias:
High Sample Rate Architectures for Block Adaptive Filters. ISCAS 1994: 131-134 - [c5]Lori Lucke, Chaitali Chakrabarti:
A Digit-Serial Architecture for Gray-Scale Morphological Filtering. ISCAS 1994: 207-210 - [c4]Gagan Gupta, Chaitali Chakrabarti:
VLSI Architectures for Hierarchical Block Matching. ISCAS 1994: 215-218 - 1993
- [j3]Chaitali Chakrabarti, D. Raghuramireddy, Rolf Unbehauen:
Comments on 'Highly modular systolic structures for denominator-separable 2-D recursive filters' [and reply]. IEEE Trans. Signal Process. 41(4): 1734-1736 (1993) - [c3]Chaitali Chakrabarti:
VLSI architectures for recursive median filters. ICASSP (1) 1993: 413-416 - [c2]Chaitali Chakrabarti:
Efficient stack filter implementations of rank order filters. ISCAS 1993: 958-961 - 1991
- [j2]Chaitali Chakrabarti, Joseph F. JáJá:
VLSI Architectures for Multidimensional Transforms. IEEE Trans. Computers 40(9): 1053-1057 (1991) - 1990
- [b1]Chaitali Chakrabarti:
VLSI Architectures for Real-Time Signal Processing. University of Maryland, College Park, MD, USA, 1990 - [j1]Chaitali Chakrabarti, Joseph F. JáJá:
Systolic Architectures for the Computation of the Discrete Hartley and the Discrete Cosine Transforms Based on Prime Factor Decomposition. IEEE Trans. Computers 39(11): 1359-1368 (1990) - [c1]Chaitali Chakrabarti, Joseph F. JáJá:
A parallel algorithm for template matching on an SIMD mesh connected computer. ICPR (2) 1990: 362-367
Coauthor Index
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