default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDAndreas Koch 0001
Person information
- affiliation: TU Darmstadt, Department of Computer Science, Germany
- affiliation: TU Braunschweig, Department of Computer Science, Germany
Other persons with the same name
- Andreas Koch — disambiguation page
- Andreas Koch 0002 — University of Hagen, Department of Computer Science
- Andreas Koch 0003 — University of Stuttgart, Institute of Parallel and Distributed Systems
- Andreas Koch 0004 — University of Salzburg, Department of Geography and Geology, Austria
- Andreas Koch 0005 — University of Kassel, Department of Computer Science and Electrical Engineering
- Andreas Koch 0006 — Institute for Applied Economic Research (IAW) at the University of Tübingen
- Andreas Koch 0007 — European Institute for Energy Research (EIFER), Karlsruhe, Germany
- Andreas Koch 0008 — University of Copenhagen, Institute of Economics, Denmark
- Andreas Koch 0009 — RWTH Aachen University, Institute for Textile Technology, Germany
- Andreas Koch 0010 — RWTH Aachen University, Germany
- Andreas Koch 0011 — Continental AG, Germany (and 1 more)
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
showing all ?? records
2020 – today
- 2024
[j27]Matthias Jasny
, Lasse Thostrup, Sajjad Tamimi, Andreas Koch, Zsolt István, Carsten Binnig:
Zero-sided RDMA: Network-driven Data Shuffling for Disaggregated Heterogeneous Cloud DBMSs. Proc. ACM Manag. Data 2(1): 36:1-36:28 (2024)- [j26]Andreas Koch, Kentaro Sano:
Introduction to the Special Issue on FPL 2022. ACM Trans. Reconfigurable Technol. Syst. 17(2): 19:1-19:3 (2024) - [j25]Babar Khan, Carsten Heinz, Andreas Koch:
The Open-source DeLiBA2 Hardware/Software Framework for Distributed Storage Accelerators. ACM Trans. Reconfigurable Technol. Syst. 17(2): 23:1-23:32 (2024) - [c133]Torben Kalkhof, Carsten Heinz, Andreas Koch:
Enabling FPGA and AI Engine Tasks in the HPX Programming Framework for Heterogeneous High-Performance Computing. ARC 2024: 75-89 - [c132]Jonathan Strobl, Leonardo Solis-Vasquez, Yannick Lavan, Andreas Koch:
Graphtoy: Fast Software Simulation of Applications for AMD's AI Engines. ARC 2024: 166-180 - [c131]Julian Oppermann, Brindusa Mihaela Damian-Kosterhon, Florian Meisel, Tammo Mürmann, Eyck Jentzsch, Andreas Koch:
Longnail: High-Level Synthesis of Portable Custom Instruction Set Extensions for RISC-V Processors from Descriptions in the Open-Source CoreDSL Language. ASPLOS (3) 2024: 591-606 - [c130]Paul Palomero Bernardo, Patrick Schmid, Oliver Bringmann, Mohammed Iftekhar, Babak Sadiye, Wolfgang Mueller, Andreas Koch, Eyck Jentzsch, Axel Sauer, Ingo Feldner, Wolfgang Ecker:
A Scalable RISC-V Hardware Platform for Intelligent Sensor Processing. DATE 2024: 1-5 - [c129]Carsten Heinz, Torben Kalkhof, Yannick Lavan, Andreas Koch:
TaPaS Co-AIE: An Open-Source Framework for Streaming-Based Heterogeneous Acceleration Using AMD AI Engines. IPDPS (Workshops) 2024: 155-161 - 2023
- [j24]Andreas Koch, Wei Zhang:
Introduction to the Special Issue on FPT 2021. ACM Trans. Reconfigurable Technol. Syst. 16(2): 30:1-30:2 (2023) - [c128]Sajjad Tamimi, Arthur Bernhardt, Florian Stock, Ilia Petrov, Andreas Koch:
NVMulator: A Configurable Open-Source Non-volatile Memory Emulator for FPGAs. ARC 2023: 35-50 - [c127]Arthur Bernhardt, Andreas Koch, Ilia Petrov:
pimDB: From Main-Memory DBMS to Processing-In-Memory DBMS-Engines on Intelligent Memories. DaMoN 2023: 44-52 - [c126]Florian Meisel, David Volz, Christoph Spang, Dat Tran, Andreas Koch:
TaPaFuzz - An FPGA-Accelerated Framework for RISC-V IoT Graybox Fuzzing. DASIP 2023: 82-94 - [c125]Leonardo Solis-Vasquez, Edward Mascarenhas, Andreas Koch:
Experiences Migrating CUDA to SYCL: A Molecular Docking Case Study. IWOCL 2023: 15:1-15:11 - [c124]David Volz, Andreas Koch, Bastian Bloessl:
Software-Defined Wireless Communication Systems for Heterogeneous Architectures. MobiCom 2023: 110:1-110:3 - [c123]Carsten Heinz, Andreas Koch:
$\mathrm {DD\text {-}MPU}$: Dynamic and Distributed Memory Protection Unit for Embedded System-on-Chips. SAMOS 2023: 285-295 - [c122]Christoph Weckert, Leonardo Solis-Vasquez, Julian Oppermann, Andreas Koch, Oliver Sinnen:
Altis-SYCL: Migrating Altis Benchmarking Suite from CUDA to SYCL for GPUs and FPGAs. SC Workshops 2023: 547-555 - [i4]Richard Sattel, Christoph Spang, Carsten Heinz, Andreas Koch:
PQC-HA: A Framework for Prototyping and In-Hardware Evaluation of Post-Quantum Cryptography Hardware Accelerators. CoRR abs/2308.06621 (2023) - 2022
- [j23]Lukas Weber, Tobias Vinçon, Christian Knödler, Leonardo Solis-Vasquez, Arthur Bernhardt, Ilia Petrov, Andreas Koch:
On the necessity of explicit cross-layer data formats in near-data processing systems. Distributed Parallel Databases 40(1): 27-45 (2022) - [j22]Leonardo Solis-Vasquez, Andreas F. Tillack, Diogo Santos-Martins, Andreas Koch, Scott LeGrand, Stefano Forli:
Benchmarking the performance of irregular computations in AutoDock-GPU molecular docking. Parallel Comput. 109: 102861 (2022) - [j21]Tobias Vinçon, Christian Knödler, Leonardo Solis-Vasquez, Arthur Bernhardt, Sajjad Tamimi, Lukas Weber, Florian Stock, Andreas Koch, Ilia Petrov:
Near-Data Processing in Database Systems on Native Computational Storage under HTAP Workloads. Proc. VLDB Endow. 15(10): 1991-2004 (2022) - [j20]Christoph Spang, Yannick Lavan, Marco Hartmann, Florian Meisel, Andreas Koch:
DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity. J. Signal Process. Syst. 94(7): 739-752 (2022) - [j19]Carsten Heinz, Andreas Koch:
On-Chip and Distributed Dynamic Parallelism for Task-based Hardware Accelerators. J. Signal Process. Syst. 94(9): 883-893 (2022) - [c121]David Volz, Christoph Spang, Andreas Koch:
IPEC: Open-Source Design Automation for Inter-Processing Element Communication. ARC 2022: 134-149 - [c120]Lukas Sommer, Cristian Axenie, Andreas Koch:
SPNC: An Open-Source MLIR-Based Compiler for Fast Sum-Product Network Inference on CPUs and GPUs. CGO 2022: 1-11 - [c119]Mihaela Damian, Julian Oppermann, Christoph Spang, Andreas Koch:
SCAIE-V: an open-source SCAlable interface for ISA extensions for RISC-V processors. DAC 2022: 169-174 - [c118]Tobias Vinçon, Christian Knödler, Arthur Bernhardt, Leonardo Solis-Vasquez, Lukas Weber, Andreas Koch, Ilia Petrov:
Result-Set Management for NDP Operations on Smart Storage. DaMoN 2022: 12:1-12:5 - [c117]Wolfgang Ecker, Peer Adelt, Wolfgang Müller, Reinhold Heckmann, Milos Krstic, Vladimir Herdt, Rolf Drechsler, Gerhard Angst, Ralf Wimmer, Andreas Mauderer, Rafael Stahl, Karsten Emrich, Daniel Mueller-Gritschneder, Bernd Becker, Philipp Scholl, Eyck Jentzsch, Jan Schlamelcher, Kim Grüttner, Paul Palomero Bernardo, Oliver Bringmann, Mihaela Damian, Julian Oppermann, Andreas Koch, Jörg Bormann, Johannes Partzsch, Christian Mayr, Wolfgang Kunz:
The Scale4Edge RISC-V Ecosystem. DATE 2022: 808-813 - [c116]Arthur Bernhardt, Sajjad Tamimi, Florian Stock, Tobias Vinçon, Andreas Koch, Ilia Petrov:
Cache-Coherent Shared Locking for Transactionally Consistent Updates in Near-Data Processing DBMS on Smart Storage. EDBT 2022: 2:424-2:428 - [c115]Sajjad Tamimi, Florian Stock, Andreas Koch, Arthur Bernhardt, Ilia Petrov:
An Evaluation of Using CCIX for Cache-Coherent Host-FPGA Interfacing. FCCM 2022: 1-9 - [c114]Babar Khan, Carsten Heinz, Andreas Koch:
DeLiBA: An Open-Source Hardware/Software Framework for the Development of Linux Block I/O Accelerators. FPL 2022: 183-191 - [c113]Torben Kalkhof, Andreas Koch:
Direct Device-to-Device Physical Page Migrations in Multi-FPGA Shared Virtual Memory Systems. FPL 2022: 225-234 - [c112]Arthur Bernhardt, Sajjad Tamimi, Tobias Vinçon, Christian Knödler, Florian Stock, Carsten Heinz, Andreas Koch, Ilia Petrov:
neoDBMS: In-situ Snapshots for Multi-Version DBMS on Native Computational Storage. ICDE 2022: 3170-3173 - [c111]Lukas Weber, Johannes Wirth, Lukas Sommer, Andreas Koch:
Exploiting High-Bandwidth Memory for FPGA-Acceleration of Inference on Sum-Product Networks. IPDPS Workshops 2022: 112-119 - 2021
- [j18]Leonardo Solis-Vasquez, Erich Focht, Andreas Koch:
Porting and Optimizing Molecular Docking onto the SX-Aurora TSUBASA Vector Computer. Supercomput. Front. Innov. 8(2): 27-42 (2021) - [j17]Dennis Wolf, Andreas Engel, Tajas Ruschke, Andreas Koch, Christian Hochberger:
UltraSynth: Insights of a CGRA Integration into a Control Engineering Environment. J. Signal Process. Syst. 93(5): 463-479 (2021) - [j16]Carsten Heinz, Jaco A. Hofmann, Jens Korinth, Lukas Sommer, Lukas Weber, Andreas Koch:
The TaPaSCo Open-Source Toolflow. J. Signal Process. Syst. 93(5): 545-563 (2021) - [c110]Johannes Wirth, Jaco A. Hofmann, Lasse Thostrup, Andreas Koch, Carsten Binnig:
Exploiting 3D Memory for Accelerated In-Network Processing of Hash Joins in Distributed Databases. ARC 2021: 18-32 - [c109]Carsten Heinz, Andreas Koch:
Supporting On-Chip Dynamic Parallelism for Task-Based Hardware Accelerators. ARC 2021: 81-92 - [c108]Lukas Sommer, Michael Halkenhäuser, Cristian Axenie, Andreas Koch:
SPNC: Accelerating Sum-Product Network Inference on CPUs and GPUs. ASAP 2021: 53-56 - [c107]Christian Knödler, Tobias Vinçon, Arthur Bernhardt, Ilia Petrov, Leonardo Solis-Vasquez, Lukas Weber, Andreas Koch:
A cost model for NDP-aware query optimization for KV-stores. DaMoN 2021: 12:1-12:5 - [c106]Christoph Spang, Yannick Lavan, Marco Hartmann, Florian Meisel, Andreas Koch:
DExIE - An IoT-Class Hardware Monitor for Real-Time Fine-Grained Control-Flow Integrity. DASIP 2021: 26-34 - [c105]Torben Kalkhof, Andreas Koch:
Efficient Physical Page Migrations in Shared Virtual Memory Reconfigurable Computing Systems. FPT 2021: 1-10 - [c104]Johannes Wirth, Jaco A. Hofmann, Lasse Thostrup, Carsten Binnig, Andreas Koch:
Scalable and Flexible High-Performance In-Network Processing of Hash Joins in Distributed Databases. FPT 2021: 1-9 - [c103]Marco Hartmann, Lukas Weber, Johannes Wirth, Lukas Sommer, Andreas Koch:
Optimizing a Hardware Network Stack to Realize an In-Network ML Inference Application. H2RC@SC 2021: 21-32 - [c102]Carsten Heinz, Andreas Koch:
Near-Data FPGA-Accelerated Processing of Collective and Inference Operations in Disaggregated Memory Systems. H2RC@SC 2021: 44-51 - [c101]Lukas Weber, Lukas Sommer, Leonardo Solis-Vasquez, Tobias Vinçon, Christian Knödler, Arthur Bernhardt, Ilia Petrov, Andreas Koch:
A Framework for the Automatic Generation of FPGA-based Near-Data Processing Accelerators in Smart Storage Systems. IPDPS Workshops 2021: 136-143 - [c100]Lukas Sommer, Cristian Axenie, Andreas Koch:
SPNC: Fast Sum-Product Network Inference. PKDD/ECML Workshops (1) 2021: 397-408 - [c99]Christoph Spang, Florian Meisel, Andreas Koch:
RT-LIFE: Portable RISC-V Interface for Real-Time Lightweight Security Enforcement. SAMOS 2021: 179-194 - [c98]Hanna Kruppe, Lukas Sommer, Lukas Weber, Julian Oppermann, Cristian Axenie, Andreas Koch:
Efficient Operator Sharing Modulo Scheduling for Sum-Product Network Inference on FPGAs. SAMOS 2021: 242-258 - [c97]Leonardo Solis-Vasquez, Erich Focht, Andreas Koch:
Mapping Irregular Computations for Molecular Docking to the SX-Aurora TSUBASA Vector Engine. IA3@SC 2021: 1-10 - 2020
- [j15]Tobias Vinçon, Lukas Weber, Arthur Bernhardt, Andreas Koch, Ilia Petrov, Christian Knödler, Sergey Hardock, Sajjad Tamimi, Christian Riegger:
nKV in Action: Accelerating KV-Stores on NativeComputational Storage with Near-Data Processing. Proc. VLDB Endow. 13(12): 2981-2984 (2020) - [c96]Scott LeGrand, Aaron Scheinberg, Andreas F. Tillack, Mathialakan Thavappiragasam, Josh Vincent Vermaas, Rupesh Agarwal, Jeff Larkin, Duncan Poole, Diogo Santos-Martins, Leonardo Solis-Vasquez, Andreas Koch, Stefano Forli, Oscar R. Hernandez, Jeremy C. Smith, Ada Sedova:
GPU-Accelerated Drug Discovery with Docking on the Summit Supercomputer: Porting, Optimization, and Application to COVID-19 Research. BCB 2020: 43:1-43:10 - [c95]Jens Huthmann, Artur Podobas, Lukas Sommer, Andreas Koch, Kentaro Sano:
Extending High-Level Synthesis with High-Performance Computing Performance Visualization. CLUSTER 2020: 371-380 - [c94]Tobias Vinçon, Arthur Bernhardt, Ilia Petrov, Lukas Weber, Andreas Koch:
nKV: near-data processing with KV-stores on native computational storage. DaMoN 2020: 10:1-10:11 - [c93]Lukas Sommer, Andreas Koch:
OpenMP Device Offloading for Embedded Heterogeneous Platforms - Work-in-Progress. EMSOFT 2020: 4-6 - [c92]Lukas Sommer, Lukas Weber, Martin Kumm, Andreas Koch:
Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs. FCCM 2020: 75-83 - [c91]Tobias Vinçon, Arthur Bernhardt, Lukas Weber, Andreas Koch, Ilia Petrov:
On the Necessity of Explicit Cross-Layer Data Formats in Near-Data Processing Systems. ICDE Workshops 2020: 109-114 - [c90]Jens Huthmann, Lukas Sommer, Artur Podobas, Andreas Koch, Kentaro Sano:
OpenMP Device Offloading to FPGAs Using the Nymble Infrastructure. IWOMP 2020: 265-279 - [c89]Lukas Sommer, Florian Stock, Leonardo Solis-Vasquez, Andreas Koch:
Using Parallel Programming Models for Automotive Workloads on Heterogeneous Systems - a Case Study. PDP 2020: 17-21 - [c88]Leonardo Solis-Vasquez, Diogo Santos-Martins, Andreas Koch, Stefano Forli:
Evaluating the Energy Efficiency of OpenCL-accelerated AutoDock Molecular Docking. PDP 2020: 162-166 - [c87]Carsten Heinz, Jaco A. Hofmann, Lukas Sommer, Andreas Koch:
Improving Job Launch Rates in the TaPaSCo FPGA Middleware by Hardware/Software-Co-Design. ROSS@SC 2020: 22-30 - [c86]Leonardo Solis-Vasquez, Diogo Santos-Martins, Andreas F. Tillack, Andreas Koch, Jérôme Eberhardt, Stefano Forli:
Parallelizing Irregular Computations for Molecular Docking. IA3@SC 2020: 12-21
2010 – 2019
- 2019
- [j14]Lea El-Khoury, Diogo Santos-Martins, Sukanya Sasmal, Jérôme Eberhardt, Giulia Bianco, Francesca Alessandra Ambrosio, Leonardo Solis-Vasquez, Andreas Koch, Stefano Forli, David L. Mobley:
Comparison of affinity ranking using AutoDock-GPU and MM-GBSA scores for BACE-1 inhibitors in the D3R Grand Challenge 4. J. Comput. Aided Mol. Des. 33(12): 1011-1020 (2019) - [j13]Diogo Santos-Martins, Jérôme Eberhardt, Giulia Bianco, Leonardo Solis-Vasquez, Francesca Alessandra Ambrosio, Andreas Koch, Stefano Forli:
D3R Grand Challenge 4: prospective pose prediction of BACE1 ligands with AutoDock-GPU. J. Comput. Aided Mol. Des. 33(12): 1071-1081 (2019) - [j12]Julian Oppermann, Lukas Sommer, Andreas Koch:
SpExSim: assessing kernel suitability for C-based high-level hardware synthesis. J. Supercomput. 75(8): 4062-4077 (2019) - [j11]Julian Oppermann, Melanie Reuter-Oppermann, Lukas Sommer, Andreas Koch, Oliver Sinnen:
Exact and Practical Modulo Scheduling for High-Level Synthesis. ACM Trans. Reconfigurable Technol. Syst. 12(2): 8:1-8:26 (2019) - [c85]Tobias Vinçon, Sergey Hardock, Christian Riegger, Andreas Koch, Ilia Petrov:
nativeNDP: Processing Big Data Analytics on Native Storage Nodes. ADBIS 2019: 139-150 - [c84]Jaco A. Hofmann, Lasse Thostrup, Tobias Ziegler, Carsten Binnig, Andreas Koch:
High-Performance In-Network Data Processing. ADMS@VLDB 2019: 64-73 - [c83]Jens Korinth, Jaco A. Hofmann, Carsten Heinz, Andreas Koch:
The TaPaSCo Open-Source Toolflow for the Automated Composition of Task-Based Parallel Reconfigurable Computing Systems. ARC 2019: 214-229 - [c82]Dennis Wolf, Tajas Ruschke, Christian Hochberger, Andreas Engel, Andreas Koch:
UltraSynth: Integration of a CGRA into a Control Engineering Environment. ARC 2019: 247-261 - [c81]Robin Kruppe, Julian Oppermann, Lukas Sommer, Andreas Koch:
Extending LLVM for Lightweight SPMD Vectorization: Using SIMD and Vector Instructions Easily from Any Language. CGO 2019: 278-279 - [c80]Johannes Krude, Jaco A. Hofmann, Matthias Eichholz, Klaus Wehrle, Andreas Koch, Mira Mezini:
Online Reprogrammable Multi Tenant Switches. ENCP@CoNEXT 2019: 1-8 - [c79]Sergey Hardock, Andreas Koch, Tobias Vinçon, Ilia Petrov:
IPA-IDX: In-Place Appends for B-Tree Indices. DaMoN 2019: 18:1-18:3 - [c78]Lukas Sommer, Florian Stock, Leonardo Solis-Vasquez, Andreas Koch:
DAPHNE - An automotive benchmark suite for parallel programming models on embedded heterogeneous platforms: work-in-progress. EMSOFT Companion 2019: 4 - [c77]Julian Oppermann, Patrick Sittel, Martin Kumm, Melanie Reuter-Oppermann, Andreas Koch, Oliver Sinnen:
Design-Space Exploration with Multi-Objective Resource-Aware Modulo Scheduling. Euro-Par 2019: 170-183 - [c76]Ilia Petrov, Andreas Koch, Sergey Hardock, Tobias Vinçon, Christian Riegger:
Native Storage Techniques for Data Management. ICDE 2019: 2048-2051 - [c75]Julian Oppermann, Lukas Sommer, Lukas Weber, Melanie Reuter-Oppermann, Andreas Koch, Oliver Sinnen:
SkyCastle: A Resource-Aware Multi-Loop Scheduler for High-Level Synthesis. FPT 2019: 36-44 - [c74]Lukas Weber, Lukas Sommer, Julian Oppermann, Alejandro Molina, Kristian Kersting, Andreas Koch:
Resource-Efficient Logarithmic Number Scale Arithmetic for SPN Inference on FPGAs. FPT 2019: 251-254 - [c73]Carsten Heinz, Yannick Lavan, Jaco A. Hofmann, Andreas Koch:
A Catalog and In-Hardware Evaluation of Open-Source Drop-In Compatible RISC-V Softcore Processors. ReConFig 2019: 1-8 - [c72]Micha Ober, Jaco A. Hofmann, Lukas Sommer, Lukas Weber, Andreas Koch:
High-Throughput Multi-Threaded Sum-Product Network Inference in the Reconfigurable Cloud. H2RC@SC 2019: 26-33 - [e2]Christian Hochberger, Brent Nelson, Andreas Koch, Roger F. Woods, Pedro C. Diniz:
Applied Reconfigurable Computing - 15th International Symposium, ARC 2019, Darmstadt, Germany, April 9-11, 2019, Proceedings. Lecture Notes in Computer Science 11444, Springer 2019, ISBN 978-3-030-17226-8 [contents] - [r2]Ilia Petrov, Andreas Koch, Tobias Vinçon, Sergey Hardock, Christian Riegger:
Hardware-Assisted Transaction Processing: NVM. Encyclopedia of Big Data Technologies 2019 - [r1]Ilia Petrov, Tobias Vinçon, Andreas Koch, Julian Oppermann, Sergey Hardock, Christian Riegger:
Active Storage. Encyclopedia of Big Data Technologies 2019 - [i3]Tobias Vinçon, Andreas Koch, Ilia Petrov:
Moving Processing to Data: On the Influence of Processing in Memory on Data Management. CoRR abs/1905.04767 (2019) - 2018
- [c71]Björn Liebig, Julian Oppermann, Oliver Sinnen, Andreas Koch:
Improved High-Level Synthesis for Complex CellML Models. ARC 2018: 420-432 - [c70]Julian Oppermann, Sebastian Vollbrecht, Melanie Reuter-Oppermann, Oliver Sinnen, Andreas Koch:
GeMS: a generator for modulo scheduling problems: work in progress. CASES 2018: 7:1-7:3 - [c69]Tobias Vinçon, Sergej Hardock, Christian Riegger, Julian Oppermann, Andreas Koch, Ilia Petrov:
NoFTL-KV: TacklingWrite-Amplification on KV-Stores with Native Storage Management. EDBT 2018: 457-460 - [c68]Patrick Sittel, Martin Kumm, Julian Oppermann, Konrad Möller, Peter Zipf, Andreas Koch:
ILP-Based Modulo Scheduling and Binding for Register Minimization. FPL 2018: 265-271 - [c67]Julian Oppermann, Melanie Reuter-Oppermann, Lukas Sommer, Oliver Sinnen, Andreas Koch:
Dependence Graph Preprocessing for Faster Exact Modulo Scheduling in High-Level Synthesis. FPL 2018: 280-286 - [c66]Lukas Sommer, Julian Oppermann, Alejandro Molina, Carsten Binnig, Kristian Kersting, Andreas Koch:
Automatic Mapping of the Sum-Product Network Inference Problem to FPGA-Based Accelerators. ICCD 2018: 350-357 - 2017
- [c65]Lukas Sommer, Jens Korinth, Andreas Koch:
OpenMP device offloading to FPGA accelerators. ASAP 2017: 201-205 - [c64]Leonardo Solis-Vasquez, Andreas Koch:
A Performance and Energy Evaluation of OpenCL-accelerated Molecular Docking. IWOCL 2017: 3:1-3:11 - [c63]Andreas Engel, Andreas Koch:
Energy-efficient reconfiguration of flash-based FPGAs in heterogeneous wireless sensor nodes. ReConFig 2017: 1-8 - [c62]Lukas Sommer, Julian Oppermann, Jaco A. Hofmann, Andreas Koch:
Synthesis of interleaved multithreaded accelerators from OpenMP loops. ReConFig 2017: 1-7 - 2016
- [j10]Andreas Engel, Andreas Koch:
Heterogeneous Wireless Sensor Nodes that Target the Internet of Things. IEEE Micro 36(6): 8-15 (2016) - [c61]Julian Oppermann, Andreas Koch, Melanie Reuter-Oppermann, Oliver Sinnen:
ILP-based modulo scheduling for high-level synthesis. CASES 2016: 1:1-1:10 - [c60]Jaco A. Hofmann, Jens Korinth, Andreas Koch:
A Scalable High-Performance Hardware Architecture for Real-Time Stereo Vision by Semi-Global Matching. CVPR Workshops 2016: 845-853 - [c59]Björn Liebig, Andreas Koch:
High-level synthesis of resource-shared microarchitectures from irregular complex C-code. FPT 2016: 133-140 - [c58]Jaco A. Hofmann, Jens Korinth, Andreas Koch:
A scalable latency-insensitive architecture for FPGA-accelerated semi-global matching in stereo vision applications. ReConFig 2016: 1-8 - [c57]Julian Oppermann, Andreas Koch:
Detecting Kernels Suitable for C-Based High-Level Hardware Synthesis. UIC/ATC/ScalCom/CBDCom/IoP/SmartWorld 2016: 1157-1164 - 2015
- [j9]David de la Chevallerie, Jens Korinth, Andreas Koch:
ffLink: A Lightweight High-Performance Open-Source PCI Express Gen3 Interface for Reconfigurable Accelerators. SIGARCH Comput. Archit. News 43(4): 34-39 (2015) - [c56]Jens Korinth, David de la Chevallerie, Andreas Koch:
An Open-Source Tool Flow for the Composition of Reconfigurable Hardware Thread Pool Architectures. FCCM 2015: 195-198 - [c55]Julian Oppermann, Andreas Koch, Ting Yu, Oliver Sinnen:
Domain-specific optimisation for the high-level synthesis of CellML-based simulation accelerators. FPL 2015: 1-7 - [c54]Jens Huthmann, Andreas Koch:
Optimized high-level synthesis of SMT multi-threaded hardware accelerators. FPT 2015: 176-183 - [c53]Andreas Engel, Andreas Koch:
Accelerated clock drift estimation for high-precision wireless time-synchronization. LCN Workshops 2015: 627-635 - [c52]Andreas Engel, Andreas Koch, Thomas Siebel:
A heterogeneous system architecture for low-power wireless sensor nodes in compute-intensive distributed applications. LCN Workshops 2015: 636-644 - [i2]Jens Korinth, David de la Chevallerie, Andreas Koch:
ThreadPoolComposer - An Open-Source FPGA Toolchain for Software Developers. CoRR abs/1508.06821 (2015) - 2014
- [j8]Sascha Mühlbach, Andreas Koch:
A Reconfigurable Platform and Programming Tools for High-Level Network Applications Demonstrated as a Hardware Honeypot. IEEE J. Sel. Areas Commun. 32(10): 1919-1932 (2014) - [c51]Andreas Engel, Andreas Koch:
Hardware-Accelerated Data Compression in Low-Power Wireless Sensor Networks. ARC 2014: 167-178 - [c50]Christian Hochberger, Lukas Johannes Jung, Andreas Engel, Andreas Koch:
Synthilation: JIT-compilation of microinstruction sequences in AMIDAR processors. DASIP 2014: 1-6 - [c49]Thorsten Wink, Andreas Koch:
PHAT: A technology for prototyping parallel heterogeneous architectures. DASIP 2014: 1-8 - [c48]Jens Huthmann, Julian Oppermann, Andreas Koch:
Automatic high-level synthesis of multi-threaded hardware accelerators. FPL 2014: 1-4 - [c47]Björn Liebig, Andreas Koch:
Low-latency double-precision floating-point division for FPGAs. FPT 2014: 107-114 - [c46]David de la Chevallerie, Jens Korinth, Andreas Koch:
Integrating FPGA-based processing elements into a runtime for parallel heterogeneous computing. FPT 2014: 314-317 - [c45]Andreas Engel, Andreas Koch:
An energy-efficient wireless routing protocol for distributed structural health monitoring. WMNC 2014: 1-8 - 2013
- [c44]Björn Liebig, Jens Huthmann, Andreas Koch:
Architecture Exploration of High-Performance Floating-Point Fused Multiply-Add Units and their Automatic Use in High-Level Synthesis. IPDPS Workshops 2013: 134-143 - [c43]Florian Stock, Andreas Koch, Dietmar Hildenbrand:
FPGA-accelerated color edge detection using a Geometric-Algebra-to-Verilog compiler. ISSoC 2013: 1-6 - [c42]Jens Huthmann, Björn Liebig, Julian Oppermann, Andreas Koch:
Hardware/software co-compilation with the Nymble system. ReCoSoC 2013: 1-8 - 2012
- [j7]Sascha Mühlbach, Andreas Koch:
A Dynamically Reconfigured Multi-FPGA Network Platform for High-Speed Malware Collection. Int. J. Reconfigurable Comput. 2012: 342625:1-342625:14 (2012) - [j6]Andreas Koch, Roger F. Woods:
Preface - ARC. Microprocess. Microsystems 36(8): 587 (2012) - [j5]Sascha Mühlbach, Andreas Koch:
NetStage/DPR: A self-reconfiguring platform for active and passive network security operations. Microprocess. Microsystems 36(8): 632-643 (2012) - [j4]Benjamin Thielmann, Jens Huthmann, Andreas Koch:
Memory Latency Hiding by Load Value Speculation for Reconfigurable Computers. ACM Trans. Reconfigurable Technol. Syst. 5(3): 13:1-13:14 (2012) - [c41]Sascha Mühlbach, Andreas Koch:
Malacoda: towards high-level compilation of network security applications on reconfigurable hardware. ANCS 2012: 247-258 - [c40]Andreas Engel, Björn Liebig, Andreas Koch:
Energy-efficient heterogeneous reconfigurable sensor node for distributed structural health monitoring. DASIP 2012: 1-8 - [c39]Andreas Engel, Björn Liebig, Andreas Koch:
HaLOEWEn: A heterogeneous reconfigurable sensor node for distributed structural health monitoring. DASIP 2012: 1-2 - 2011
- [c38]Andreas Engel, Björn Liebig, Andreas Koch:
Feasibility Analysis of Reconfigurable Computing in Low-Power Wireless Sensor Applications. ARC 2011: 261-268 - [c37]Sascha Mühlbach, Andreas Koch:
NetStage/DPR: A Self-adaptable FPGA Platform for Application-Level Network Security. ARC 2011: 328-339 - [c36]Holger Lange, Thorsten Wink, Andreas Koch:
MARC II: A parametrized speculative multi-ported memory subsystem for reconfigurable computers. DATE 2011: 1352-1357 - [c35]Sascha Mühlbach, Andreas Koch:
A Scalable Multi-FPGA Platform for Complex Networking Applications. FCCM 2011: 81-84 - [c34]Benjamin Thielmann, Jens Huthmann, Andreas Koch:
Precore - A Token-Based Speculation Architecture for High-Level Language to Hardware Compilation. FPL 2011: 123-129 - [c33]Benjamin Thielmann, Thorsten Wink, Jens Huthmann, Andreas Koch:
RAP: More Efficient Memory Access in Highly Speculative Execution on Reconfigurable Adaptive Computers. ReConFig 2011: 434-441 - [c32]Benjamin Thielmann, Jens Huthmann, Andreas Koch:
Evaluation of speculative execution techniques for high-level language to hardware compilation. ReCoSoC 2011: 1-8 - [c31]Sascha Mühlbach, Andreas Koch:
A novel network platform for secure and efficient malware collection based on reconfigurable hardware logic. WorldCIS 2011: 9-14 - [e1]Andreas Koch, Ram Krishnamurthy, John McAllister, Roger F. Woods, Tarek A. El-Ghazawi:
Reconfigurable Computing: Architectures, Tools and Applications - 7th International Symposium, ARC 2011, Belfast, UK, March 23-25, 2011. Proceedings. Lecture Notes in Computer Science 6578, Springer 2011, ISBN 978-3-642-19474-0 [contents] - 2010
- [j3]Holger Lange, Andreas Koch:
Architectures and Execution Models for Hardware/Software Compilation and Their System-Level Realization. IEEE Trans. Computers 59(10): 1363-1377 (2010) - [c30]Marc Stöttinger, Sorin A. Huss, Sascha Mühlbach, Andreas Koch:
Side-Channel Resistance Evaluation of a Neural Network Based Lightweight Cryptography Scheme. EUC 2010: 603-608 - [c29]Gerald Hempel, Christian Hochberger, Andreas Koch:
A Comparison of Hardware Acceleration Interfaces in a Customizable Soft Core Processor. FPL 2010: 469-474 - [c28]Hagen Gädke-Lütjens, Benjamin Thielmann, Andreas Koch:
A Flexible Compute and Memory Infrastructure for High-Level Language to Hardware Compilation. FPL 2010: 475-482 - [c27]Sascha Mühlbach, Martin Brunner, Christopher Roblee, Andreas Koch:
MalCoBox: Designing a 10 Gb/s Malware Collection Honeypot Using Reconfigurable Technology. FPL 2010: 592-595 - [c26]Sascha Mühlbach, Andreas Koch:
An FPGA-based scalable platform for high-speed malware collection in large IP networks. FPT 2010: 474-478 - [c25]Sascha Mühlbach, Andreas Koch:
A Dynamically Reconfigured Network Platform for High-Speed Malware Collection. ReConFig 2010: 79-84 - [c24]Jens Huthmann, Peter Müller, Florian Stock, Dietmar Hildenbrand, Andreas Koch:
Accelerating high-level engineering computations by automatic compilation of Geometric Algebra to hardware accelerators. ICSAMOS 2010: 216-222 - [p2]Dietmar Hildenbrand, Joachim Pitt, Andreas Koch:
Gaalop - High Performance Parallel Computing Based on Conformal Geometric Algebra. Geometric Algebra Computing 2010: 477-494 - [p1]Andreas Koch:
Adaptive Computing Systems and Their Design Tools. Dynamically Reconfigurable Systems 2010: 117-138 - [i1]Jens Huthmann, Peter Müller, Florian Stock, Dietmar Hildenbrand, Andreas Koch:
Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators. Dynamically Reconfigurable Architectures 2010
2000 – 2009
- 2009
- [c23]Holger Lange, Florian Stock, Andreas Koch, Dietmar Hildenbrand:
Acceleration and Energy Efficiency of a Geometric Algebra Computation using Reconfigurable Computers and GPUs. FCCM 2009: 255-258 - [c22]Christian Hochberger, Andreas Koch:
Challenges of Electronic CAD in the Nano Scale Era. GI Jahrestagung 2009: 2238-2252 - [c21]Florian Stock, Andreas Koch:
A Fast GPU Implementation for Solving Sparse Ill-Posed Linear Equation Systems. PPAM (1) 2009: 457-466 - 2008
- [j2]Mladen Berekovic, Christian Hochberger, Andreas Koch:
Rekonfigurierbare Architekturen. Inform. Spektrum 31(4): 344-347 (2008) - [c20]Hagen Gädke, Andreas Koch:
Accelerating Speculative Execution in High-Level Synthesis with Cancel Tokens. ARC 2008: 183-194 - [c19]Holger Lange, Andreas Koch:
Low-latency high-bandwidth HW/SW communication in a virtual memory environment. FPL 2008: 281-286 - [c18]Hagen Gädke, Florian Stock, Andreas Koch:
Memory access parallelisation in high-level language compilation for reconfigurable adaptive computers. FPL 2008: 403-408 - [c17]Dietmar Hildenbrand, Holger Lange, Florian Stock, Andreas Koch:
Efficient Inverse Kinematics Algorithm Based on Conformal Geometric Algebra - Using Reconfigurable Hardware. GRAPP 2008: 300-307 - [c16]Joachim Pitt, Dietmar Hildenbrand, Maximilian Stelzer, Andreas Koch:
Inverse kinematics of a humanoid robot based on conformal geometric algebra using optimized code generation. Humanoids 2008: 681-686 - 2007
- [j1]Philip Heng Wai Leong, Andreas Koch, Eduardo I. Boemo:
Editorial - Field-programmable logic and applications. IET Comput. Digit. Tech. 1(4): 265-266 (2007) - [c15]Holger Lange, Andreas Koch:
An Execution Model for Hardware/Software Compilation and its System-Level Realization. FPL 2007: 285-292 - [c14]Hagen Gädke, Andreas Koch:
Comrade - A Compiler for Adaptive Computing Systems Using a Novel Fast Speculation Technique. FPL 2007: 503-504 - 2006
- [c13]Florian Stock, Andreas Koch:
Architecture Exploration and Tools for Pipelined Coarse-Grained Reconfigurable Arrays. FPL 2006: 1-6 - 2005
- [c12]Nico Kasprzyk, Jan van der Veen, Andreas Koch:
Configuration Merging for Adaptive Computer Applications. FPL 2005: 217-222 - [c11]Andreas Koch, Nico Kasprzyk:
High-Level-Language Compilation for Reconfigurable Computers. ReCoSoC 2005: 1-8 - 2004
- [c10]Nico Kasprzyk, Andreas Koch:
Verbesserte Hardware-Software-Partitionierung für Adaptive Computer. ARCS Workshops 2004: 135-144 - [c9]Michael Rock, Andreas Koch:
Architecture-Independent Meta-optimization by Aggressive Tail Splitting. Euro-Par 2004: 328-335 - [c8]Holger Lange, Andreas Koch:
HW/SW Co-design by Automatic Embedding of Complex IP Cores. FPL 2004: 679-689 - [c7]Hagen Gädke, Andreas Koch:
Wavelet-Based Image Compression on the Reconfigurable Computer ACE-V. FPL 2004: 1006-1010 - 2003
- [c6]Nico Kasprzyk, Andreas Koch, Ulrich Golze, Michael Rock:
An Improved Intermediate Representation for Datapath Generation. Engineering of Reconfigurable Systems and Algorithms 2003: 88-94 - [c5]Christian Schmidt, Andreas Koch:
Fast Region Labeling on the Reconfigurable Platform ACE-V. FPL 2003: 1083-1086 - 2002
- [c4]Andreas Koch, Nico Kasprzyk:
Module Generators Driving the Compilation for Adaptive Computing Systems. FCCM 2002: 293-294 - 2000
- [c3]Holger Lange, Andreas Koch:
Memory Access Schemes for Configurable Processors. FPL 2000: 615-625
1990 – 1999
- 1999
- [c2]Andreas Koch:
Enabling Automatic Module Generation for FCCM Compilers. FCCM 1999: 274- - [c1]Matthias Böge, Andreas Koch:
A Processor for Artificial Life Simulation. FPL 1999: 495-500 - 1997
- [b1]Andreas Koch:
Regular datapaths on field programmable gate arrays. University of Braunschweig, 1997, pp. 1-195
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-10-07 22:14 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
