default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDMartin Kumm
Person information
- affiliation: University of Kassel, Digital Technology Group, Germany
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
[j17]Nicolai Fiege
, Martin Kumm, Peter Zipf:
Bit-Level Optimized Constant Multiplication Using Boolean Satisfiability. IEEE Trans. Circuits Syst. I Regul. Pap. 71(1): 249-261 (2024)- [c42]Andreas Böttcher, Martin Kumm:
Small Logic-based Multipliers with Incomplete Sub-Multipliers for FPGAs. ARITH 2024: 124-131 - [c41]Andreas Böttcher, Martin Kumm:
Multiplier Design Addressing Area-Delay Trade-offs by using DSP and Logic resources on FPGAs. ASAP 2024: 217-225 - [i7]Andreas Böttcher, Martin Kumm:
Small Logic-based Multipliers with Incomplete Sub-Multipliers for FPGAs. CoRR abs/2405.02047 (2024) - [i6]Andreas Böttcher, Martin Kumm:
Multiplier Design Addressing Area-Delay Trade-offs by using DSP and Logic resources on FPGAs. CoRR abs/2407.03962 (2024) - 2023
- [j16]Andreas Böttcher, Martin Kumm:
Towards Globally Optimal Design of Multipliers for FPGAs. IEEE Trans. Computers 72(5): 1261-1273 (2023) - [j15]Martin Kumm, Anastasia Volkova, Silviu-Ioan Filip:
Design of Optimal Multiplierless FIR Filters With Minimal Number of Adders. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(2): 658-671 (2023) - [c40]Anastasia Volkova, Rémi Garcia, Florent de Dinechin, Martin Kumm:
Hardware-Optimal Digital FIR Filters: One ILP to Rule Them all and in Faithfulness Bind Them. ACSSC 2023: 1574-1578 - [c39]Martin Hardieck, Tobias Habermann, Fabian Wagner, Michael Mecik, Martin Kumm, Peter Zipf:
More AddNet: A deeper insight into DNNs using FPGA-optimized multipliers. ISCAS 2023: 1-5 - 2022
- [j14]Rémi Garcia, Anastasia Volkova, Martin Kumm, Alexandre Goldsztejn, Jonas Kühle:
Hardware-Aware Design of Multiplierless Second-Order IIR Filters With Minimum Adders. IEEE Trans. Signal Process. 70: 1673-1686 (2022) - [c38]Tobias Habermann, Jonas Kühle, Martin Kumm, Anastasia Volkova:
Hardware-Aware Quantization for Multiplierless Neural Network Controllers. APCCAS 2022: 541-545 - [c37]Andreas Böttcher, Martin Kumm, Florent de Dinechin:
Resource Optimal Squarers for FPGAs. FPL 2022: 40-46 - [c36]Rémi Garcia, Anastasia Volkova, Martin Kumm:
Truncated Multiple Constant Multiplication with Minimal Number of Full Adders. ISCAS 2022: 263-267 - 2021
- [c35]Andreas Böttcher, Martin Kumm, Florent de Dinechin:
Resource Optimal Truncated Multipliers for FPGAs. ARITH 2021: 102-109 - [c34]Florent de Dinechin, Silviu-Ioan Filip, Martin Kumm, Anastasia Volkova:
Towards Arithmetic-Centered Filter Design. ARITH 2021: 115-118 - [i5]Rémi Garcia, Anastasia Volkova, Martin Kumm, Alexandre Goldsztejn, Jonas Kühle:
Hardware-aware Design of Multiplierless Second-Order IIR Filters with Minimum Adders. CoRR abs/2108.01565 (2021) - 2020
- [j13]Julian Faraone, Martin Kumm, Martin Hardieck, Peter Zipf, Xueyuan Liu, David Boland, Philip H. W. Leong:
AddNet: Deep Neural Networks Using FPGA-Optimized Multipliers. IEEE Trans. Very Large Scale Integr. Syst. 28(1): 115-128 (2020) - [c33]Andreas Böttcher, Keanu Kullmann, Martin Kumm:
Heuristics for the Design of Large Multipliers for FPGAs. ARITH 2020: 17-24 - [c32]Patrick Sittel, John Wickerson, Martin Kumm, Peter Zipf:
Modulo Scheduling with Rational Initiation Intervals in Custom Hardware Design. ASP-DAC 2020: 568-573 - [c31]Lukas Sommer, Lukas Weber, Martin Kumm, Andreas Koch:
Comparison of Arithmetic Number Formats for Inference in Sum-Product Networks on FPGAs. FCCM 2020: 75-83
2010 – 2019
- 2019
- [j12]Mario Garrido, Konrad Möller, Martin Kumm:
World's Fastest FFT Architectures: Breaking the Barrier of 100 GS/s. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(4): 1507-1516 (2019) - [j11]Stephen Tridgell, Martin Kumm, Martin Hardieck, David Boland, Duncan J. M. Moss, Peter Zipf, Philip H. W. Leong:
Unrolling Ternary Neural Networks. ACM Trans. Reconfigurable Technol. Syst. 12(4): 22:1-22:23 (2019) - [c30]Florent de Dinechin, Silviu-Ioan Filip, Martin Kumm, Luc Forget:
Table-Based versus Shift-And-Add Constant Multipliers for FPGAs. ARITH 2019: 151-158 - [c29]Giulio Gambardella, Johannes Kappauf, Michaela Blott, Christoph Doehring, Martin Kumm, Peter Zipf, Kees A. Vissers:
Efficient Error-Tolerant Quantized Neural Network Accelerators. DFT 2019: 1-6 - [c28]Julian Oppermann, Patrick Sittel, Martin Kumm, Melanie Reuter-Oppermann, Andreas Koch, Oliver Sinnen:
Design-Space Exploration with Multi-Objective Resource-Aware Modulo Scheduling. Euro-Par 2019: 170-183 - [c27]Martin Hardieck, Martin Kumm, Konrad Möller, Peter Zipf:
Reconfigurable Convolutional Kernels for Neural Networks on FPGAs. FPGA 2019: 43-52 - [c26]Patrick Sittel, Nicolai Fiege, Martin Kumm, Peter Zipf:
Isomorphic Subgraph-based Problem Reduction for Resource Minimal Modulo Scheduling. ReConFig 2019: 1-8 - [i4]Stephen Tridgell, Martin Kumm, Martin Hardieck, David Boland, Duncan J. M. Moss, Peter Zipf, Philip H. W. Leong:
Unrolling Ternary Neural Networks. CoRR abs/1909.04509 (2019) - [i3]Julian Faraone, Martin Kumm, Martin Hardieck, Peter Zipf, Xueyuan Liu, David Boland, Philip H. W. Leong:
AddNet: Deep Neural Networks Using FPGA-Optimized Multipliers. CoRR abs/1911.08097 (2019) - [i2]Giulio Gambardella, Johannes Kappauf, Michaela Blott, Christoph Doehring, Martin Kumm, Peter Zipf, Kees A. Vissers:
Efficient Error-Tolerant Quantized Neural Network Accelerators. CoRR abs/1912.07394 (2019) - 2018
- [j10]Martin Kumm, Johannes Kappauf:
Advanced Compressor Tree Synthesis for FPGAs. IEEE Trans. Computers 67(8): 1078-1091 (2018) - [j9]Konrad Möller, Martin Kumm, Mario Garrido, Peter Zipf:
Optimal Shift Reassignment in Reconfigurable Constant Multiplication Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(3): 710-714 (2018) - [j8]Martin Kumm:
Optimal Constant Multiplication Using Integer Linear Programming. IEEE Trans. Circuits Syst. II Express Briefs 65-II(5): 567-571 (2018) - [j7]Martin Kumm, Oscar Gustafsson, Mario Garrido, Peter Zipf:
Optimal Single Constant Multiplication Using Ternary Adders. IEEE Trans. Circuits Syst. II Express Briefs 65-II(7): 928-932 (2018) - [c25]Martin Kumm, Oscar Gustafsson, Florent de Dinechin, Johannes Kappauf, Peter Zipf:
Karatsuba with Rectangular Multipliers for FPGAs. ARITH 2018: 13-20 - [c24]Patrick Sittel, Martin Kumm, Julian Oppermann, Konrad Möller, Peter Zipf, Andreas Koch:
ILP-Based Modulo Scheduling and Binding for Register Minimization. FPL 2018: 265-271 - [c23]Martin Hardieck, Martin Kumm, Patrick Sittel, Peter Zipf:
Constant Matrix Multiplication with Ternary Adders. ICECS 2018: 85-88 - [c22]Patrick Sittel, Thomas Schönwälder, Martin Kumm, Peter Zipf:
ScaLP: A Light-Weighted (MI)LP-Library. MBMV 2018 - 2017
- [j6]Martin Kumm, Martin Hardieck, Peter Zipf:
Optimization of Constant Matrix Multiplication with Low Power and High Throughput. IEEE Trans. Computers 66(12): 2072-2080 (2017) - [j5]Konrad Möller, Martin Kumm, Marco Kleinlein, Peter Zipf:
Reconfigurable Constant Multiplication for FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(6): 927-937 (2017) - [c21]Martin Kumm, Johannes Kappauf, Matei Istoan, Peter Zipf:
Resource Optimal Design of Large Multipliers for FPGAs. ARITH 2017: 131-138 - [c20]Patrick Sittel, Konrad Möller, Martin Kumm, Peter Zipf, Bogdan Pasca, Mark Jervis:
Model-based hardware design based on compatible sets of isomorphic subgraphs. FPT 2017: 199-202 - [c19]Patrick Sittel, Martin Kumm, Konrad Möller, Martin Hardieck, Peter Zipf:
High-Level Synthesis for Model-Based Design with Automatic Folding including Combined Common Subcircuits. MBMV 2017: 103-114 - 2016
- [b1]Martin Kumm:
Multiple constant multiplication optimizations for field programmable gate arrays. University of Kassel, Germany, Springer Vieweg 2016, ISBN 978-3-658-13322-1, pp. 1-206 - [j4]Martin Kumm, Peter Zipf:
Comment on "High Efficiency Generalized Parallel Counters for Look-Up Table Based FPGAs". Int. J. Reconfigurable Comput. 2016: 3015403:1-3015403:3 (2016) - [j3]Mario Garrido, Petter Kallstrom, Martin Kumm, Oscar Gustafsson:
CORDIC II: A New Improved CORDIC Algorithm. IEEE Trans. Circuits Syst. II Express Briefs 63-II(2): 186-190 (2016) - [c18]Martin Kumm, Marco Kleinlein, Peter Zipf:
Efficient sum of absolute difference computation on FPGAs. FPL 2016: 1-4 - 2015
- [c17]Martin Kumm, Shahid Abbas, Peter Zipf:
An Efficient Softcore Multiplier Architecture for Xilinx FPGAs. ARITH 2015: 18-25 - [c16]Mathias Faust, Martin Kumm, Chip-Hong Chang, Peter Zipf:
Efficient structural adder pipelining in transposed form FIR filters. DSP 2015: 311-314 - [i1]Konrad Möller, Martin Kumm, Charles-Frederic Müller, Peter Zipf:
Model-based Hardware Design for FPGAs using Folding Transformations based on Subcircuits. CoRR abs/1508.06811 (2015) - 2014
- [c15]Martin Kumm, Peter Zipf:
Pipelined compressor tree optimization using integer linear programming. FPL 2014: 1-8 - [c14]Konrad Möller, Martin Kumm, Marco Kleinlein, Peter Zipf:
Pipelined reconfigurable multiplication with constants on FPGAs. FPL 2014: 1-6 - [c13]Konrad Möller, Martin Kumm, Björn Barschtipan, Peter Zipf:
Dynamically Reconfigurable Constant Multiplication on FPGAs. MBMV 2014: 159-169 - [c12]Martin Kumm, Peter Zipf:
Efficient High Speed Compression Trees on Xilinx FPGAs. MBMV 2014: 171-182 - 2013
- [j2]Martin Kumm, Diana Fanghänel, Konrad Möller, Peter Zipf, Uwe Meyer-Baese:
FIR filter optimization for video processing on FPGAs. EURASIP J. Adv. Signal Process. 2013: 111 (2013) - [c11]Martin Kumm, Martin Hardieck, Jens Willkomm, Peter Zipf, Uwe Meyer-Baese:
Multiple constant multiplication with ternary adders. FPL 2013: 1-8 - [c10]Martin Kumm, Konrad Möller, Peter Zipf:
Partial LUT size analysis in distributed arithmetic FIR Filters on FPGAs. ISCAS 2013: 2054-2057 - [c9]Martin Kumm, Konrad Möller, Peter Zipf:
Reconfigurable FIR filter using distributed arithmetic on FPGAs. ISCAS 2013: 2058-2061 - [c8]Martin Kumm, Konrad Möller, Peter Zipf:
Dynamically reconfigurable FIR filter architectures with fast reconfiguration. ReCoSoC 2013: 1-8 - 2012
- [c7]Martin Kumm, Katharina Liebisch, Peter Zipf:
Reduced complexity single and multiple constant multiplication in floating point precision. FPL 2012: 255-261 - [c6]Michael Kunz, Martin Kumm, Martin Heide, Peter Zipf:
Area estimation of look-up table based fixed-point computations on the example of a real-time high dynamic range imaging system. FPL 2012: 591-594 - [c5]Martin Kumm, Peter Zipf:
Hybrid multiple constant multiplication for FPGAs. ICECS 2012: 556-559 - [c4]Martin Kumm, Peter Zipf, Mathias Faust, Chip-Hong Chang:
Pipelined adder graph optimization for high speed multiple constant multiplication. ISCAS 2012: 49-52 - 2011
- [c3]Martin Kumm, Peter Zipf:
High speed low complexity FPGA-based FIR filters using pipelined adder graphs. FPT 2011: 1-4 - 2010
- [j1]Martin Kumm, Harald Klingbeil, Peter Zipf:
An FPGA-Based Linear All-Digital Phase-Locked Loop. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2487-2497 (2010)
2000 – 2009
- 2008
- [c2]Martin Kumm, M. Shahab Sanjari:
Digital hilbert transformers for FPGA-based phase-locked loops. FPL 2008: 251-256 - 2006
- [c1]Andre Guntoro, Peter Zipf, Oliver Soffke, Harald Klingbeil, Martin Kumm, Manfred Glesner:
Implementation of Realtime and Highspeed Phase Detector on FPGA. ARC 2006: 1-11
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-09-12 03:26 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
