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Elena I. Vatajelu
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2020 – today
- 2024
- [j11]Pietro Inglese, Elena-Ioana Vatajelu, Giorgio Di Natale:
Side Channel and Fault Analyses on Memristor-Based Logic In-Memory. IEEE Des. Test 41(3): 29-35 (2024) - [j10]Vasilii Kulagin, Sergio Vinagrero Gutierrez, Tobias Kilian, Daniel Tille, Ulf Schlichtmann, Giorgio Di Natale, Elena-Ioana Vatajelu:
On the Relation Between Reliability and Entropy in Physical Unclonable Functions. IEEE Des. Test 41(6): 46-53 (2024) - [c57]Fabio Pavanello, Cédric Marchand, Paul Jiménez, Xavier Letartre, Ricardo Chaves, Niccolò Marastoni, Alberto Lovato, Mariano Ceccato, George Papadimitriou, Vasileios Karakostas, Dimitris Gizopoulos, Roberta Bardini, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino, Laurence Lerch, Ulrich Rührmair, Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu:
Security Layers and Related Services within the Horizon Europe NEUROPULS Project. DATE 2024: 1-6 - [c56]Aghiles Douadi, Elena-Ioana Vatajelu, Paolo Maistri, David Hély, Vincent Beroulle, Giorgio Di Natale:
Modeling Thermal Effects For Biasing PUFs. ETS 2024: 1-4 - [c55]Nasr-Eddine Ouldei Tebina, Aghiles Douadi, Luc Salvo, Vincent Beroulle, Nacer-Eddine Zergainoh, Guillaume Hubert, Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Maistri:
Non-Invasive Attack on Ring Oscillator-Based PUFs Through Localized X-Ray Irradiation. HOST 2024: 1-11 - [c54]Alberto Bosio, M. Gomes, Fabio Pavanello, A. Porsia, Annachiara Ruospo, Ernesto Sánchez, Elena I. Vatajelu:
Resiliency Approaches in Convolutional, Photonic, and Spiking Neural Networks. LATS 2024: 1-10 - [c53]Salah Daddinounou, Elena-Ioana Vatajelu:
Study of a Spintronic-based STDP-trained SNN under Fabrication-induced Process Variability. LATS 2024: 1-2 - [c52]Leonardo Miceli, Elena-Ioana Vatajelu, Víctor H. Champac:
Fault Analysis for a MTJ-based Spiking Neural Network. LATS 2024: 1-6 - 2023
- [c51]Sergio Vinagrero Gutierrez, Pietro Inglese, Giorgio Di Natale, Elena-Ioana Vatajelu:
Open Automation Framework for Complex Parametric Electrical Simulations. DDECS 2023: 132-135 - [c50]Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino:
EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. ETS 2023: 1-6 - [c49]Aghiles Douadi, Giorgio Di Natale, Paolo Maistri, Elena-Ioana Vatajelu, Vincent Beroulle:
A Study of High Temperature Effects on Ring Oscillator Based Physical Unclonable Functions. IOLTS 2023: 1-7 - [c48]Maryam Esmaeilian, Aghiles Douadi, Zahra Kazemi, Vincent Beroulle, Amir-Pasha Mirbaha, Mahdi Fazeli, Elena-Ioana Vatajelu, Paolo Maistri, Giorgio Di Natale:
Experimental Evaluation of Delayed-Based Detectors Against Power-off Attack. IOLTS 2023: 1-3 - [c47]Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu:
On-Line Method to Limit Unreliability and Bit-Aliasing in RO-PUF. IOLTS 2023: 1-6 - [c46]Fabio Pavanello, Elena-Ioana Vatajelu, Alberto Bosio, Thomas Van Vaerenbergh, Peter Bienstman, Benoît Charbonnier, Alessio Carpegna, Stefano Di Carlo, Alessandro Savino:
Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies. VTS 2023: 1-10 - [i4]Fabio Pavanello, Elena-Ioana Vatajelu, Alberto Bosio, Thomas Van Vaerenbergh, Peter Bienstman, Benoît Charbonnier, Alessio Carpegna, Stefano Di Carlo, Alessandro Savino:
Special Session: Neuromorphic hardware design and reliability from traditional CMOS to emerging technologies. CoRR abs/2305.01818 (2023) - [i3]Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino:
NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. CoRR abs/2305.03139 (2023) - [i2]Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu:
Python Framework for Modular and Parametric SPICE Netlists Generation. CoRR abs/2306.12224 (2023) - [i1]Fabio Pavanello, Cédric Marchand, Paul Jiménez, Xavier Letartre, Ricardo Chaves, Niccolò Marastoni, Alberto Lovato, Mariano Ceccato, George Papadimitriou, Vasileios Karakostas, Dimitris Gizopoulos, Roberta Bardini, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino, Laurence Lerch, Ulrich Rührmair, Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu:
Security layers and related services within the Horizon Europe NEUROPULS project. CoRR abs/2312.09383 (2023) - 2022
- [j9]Said Hamdioui, Elena I. Vatajelu, Alberto Bosio:
Guest Editorial: Computation-In-Memory (CIM): from Device to Applications. ACM J. Emerg. Technol. Comput. Syst. 18(2): 31:1-31:3 (2022) - [c45]Cristiana Bolchini, Alberto Bosio, Luca Cassano, Bastien Deveautour, Giorgio Di Natale, Antonio Miele, Ian O'Connor, Elena-Ioana Vatajelu:
Dependability of Alternative Computing Paradigms for Machine Learning: hype or hope? DDECS 2022: 7-13 - [c44]Salah Daddinounou, Elena-Ioana Vatajelu:
Synaptic Control for Hardware Implementation of Spike Timing Dependent Plasticity. DDECS 2022: 106-111 - [c43]Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu:
On-Line Reliability Estimation of Ring Oscillator PUF. ETS 2022: 1-2 - [e1]Cristiana Bolchini, Ingrid Verbauwhede, Elena-Ioana Vatajelu:
2022 Design, Automation & Test in Europe Conference & Exhibition, DATE 2022, Antwerp, Belgium, March 14-23, 2022. IEEE 2022, ISBN 978-3-9819263-6-1 [contents] - 2021
- [c42]Honorio Martín, Elena-Ioana Vatajelu, Giorgio Di Natale:
Identification of Hardware Devices based on Sensors and Switching Activity: a Preliminary Study. DATE 2021: 1496-1499 - [c41]Pietro Inglese, Elena-Ioana Vatajelu, Giorgio Di Natale:
On the Limitations of Concatenating Boolean Operations in Memristive-Based Logic-In-Memory Solutions. DTIS 2021: 1-5 - 2020
- [j8]Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Gabriella Trucco, Elena I. Vatajelu:
Stuck-At Fault Mitigation of Emerging Technologies Based Switching Lattices. J. Electron. Test. 36(3): 313-326 (2020) - [c40]Francesco Regazzoni, Shivam Bhasin, Amir Alipour, Ihab Alshaer, Furkan Aydin, Aydin Aysu, Vincent Beroulle, Giorgio Di Natale, Paul D. Franzon, David Hély, Naofumi Homma, Akira Ito, Dirmanto Jap, Priyank Kashyap, Ilia Polian, Seetal Potluri, Rei Ueno, Elena-Ioana Vatajelu, Ville Yli-Mäyry:
Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-. ICCAD 2020: 141:1-141:6
2010 – 2019
- 2019
- [j7]Elena-Ioana Vatajelu, Paolo Prinetto, Mottaqiallah Taouil, Said Hamdioui:
Challenges and Solutions in Emerging Memory Testing. IEEE Trans. Emerg. Top. Comput. 7(3): 493-506 (2019) - [j6]Elena-Ioana Vatajelu, Giorgio Di Natale:
High-Entropy STT-MTJ-Based TRNG. IEEE Trans. Very Large Scale Integr. Syst. 27(2): 491-495 (2019) - [c39]Giorgio Di Natale, Elena-Ioana Vatajelu, Kalpana Senthamarai Kannan, Lorena Anghel:
Hidden-Delay-Fault Sensor for Test, Reliability and Security. DATE 2019: 316-319 - [c38]Alberto Bosio, Ian O'Connor, Gennaro Severino Rodrigues, Fernanda Lima Kastensmidt, Elena I. Vatajelu, Giorgio Di Natale, Lorena Anghel, Surya Nagarajan, Moritz Fieback, Said Hamdioui:
Rebooting Computing: The Challenges for Test and Reliability. DFT 2019: 8138-8143 - [c37]Elena-Ioana Vatajelu, Giorgio Di Natale, Mohd Syafiq Mispan, Basel Halak:
On the Encryption of the Challenge in Physically Unclonable Functions. IOLTS 2019: 115-120 - [c36]Stephan Eggersglüß, Said Hamdioui, Artur Jutman, Maria K. Michael, Jaan Raik, Matteo Sonza Reorda, Mehdi Baradaran Tahoori, Elena-Ioana Vatajelu:
IEEE European Test Symposium (ETS). ITC 2019: 1-4 - [c35]Honorio Martín, Elena-Ioana Vatajelu, Giorgio Di Natale, Osnat Keren:
On the Reliability of the Ring Oscillator Physically Unclonable Functions. IVSW 2019: 25-30 - [c34]Lorena Anghel, Anna Bernasconi, Valentina Ciriani, Luca Frontini, Gabriella Trucco, Elena I. Vatajelu:
Fault Mitigation of Switching Lattices under the Stuck-At-Fault Model. LATS 2019: 1-6 - [c33]Elena-Ioana Vatajelu, Giorgio Di Natale, Lorena Anghel:
Special Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN). VTS 2019: 1-8 - 2018
- [j5]Lorena Anghel, Mounir Benabdenbi, Alberto Bosio, Marcello Traiola, Elena-Ioana Vatajelu:
Test and Reliability in Approximate Computing. J. Electron. Test. 34(4): 375-387 (2018) - [j4]Elena-Ioana Vatajelu, Peyman Pouyan, Said Hamdioui:
State of the art and challenges for test and reliability of emerging nonvolatile resistive memories. Int. J. Circuit Theory Appl. 46(1): 4-28 (2018) - [c32]Elena-Ioana Vatajelu, Lorena Anghel, Jean-Michel Portal, Marc Bocquet, Guillaume Prenat:
Resistive and Spintronic RAMs: Device, Simulation, and Applications. IOLTS 2018: 109-114 - [c31]Muhammed Ceylan Morgül, Onur Tunali, Mustafa Altun, Luca Frontini, Valentina Ciriani, Elena-Ioana Vatajelu, Lorena Anghel, Csaba Andras Moritz, Mircea R. Stan, Dan Alexandrescu:
Integrated Synthesis Methodology for Crossbar Arrays. NANOARCH 2018: 91-97 - [c30]Lorena Anghel, Denys Ly, Giorgio Di Natale, Benoît Miramond, Elena-Ioana Vatajelu, Elisa Vianello:
Neuromorphic Computing - From Robust Hardware Architectures to Testing Strategies. VLSI-SoC 2018: 176-179 - 2017
- [c29]Mario Barbareschi, Alberto Bosio, Hoang Anh Du Nguyen, Said Hamdioui, Marcello Traiola, Elena-Ioana Vatajelu:
Memristive devices: Technology, design automation and computing frontiers. DTIS 2017: 1-8 - [c28]Elena-Ioana Vatajelu, Rosa Rodríguez-Montañés, Michel Renovell, Joan Figueras:
Mitigating read & write errors in STT-MRAM memories under DVS. ETS 2017: 1-2 - [c27]Elena-Ioana Vatajelu, Lorena Anghel:
Reliability analysis of MTJ-based functional module for neuromorphic computing. IOLTS 2017: 126-131 - [c26]Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto:
Zero bit-error-rate weak PUF based on Spin-Transfer-Torque MRAM memories. IVSW 2017: 128-133 - [c25]Elena-Ioana Vatajelu, Lorena Anghel:
Fully-connected single-layer STT-MTJ-based spiking neural network under process variability. NANOARCH 2017: 21-26 - 2016
- [j3]Elena-Ioana Vatajelu, Giorgio Di Natale, Mario Barbareschi, Lionel Torres, Marco Indaco, Paolo Prinetto:
STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability. ACM J. Emerg. Technol. Comput. Syst. 13(1): 5:1-5:21 (2016) - [c24]Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto:
Towards a highly reliable SRAM-based PUFs. DATE 2016: 273-276 - [c23]Antonio Varriale, Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto, Pascal Trotta, Tiziana Margaria:
SEcube™: An open-source security platform in a single SoC. DTIS 2016: 1-6 - [c22]Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto:
STT-MTJ-based TRNG with on-the-fly temperature/current variation compensation. IOLTS 2016: 179-184 - [c21]Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto:
Security primitives (PUF and TRNG) with STT-MRAM. VTS 2016: 1-4 - 2015
- [c20]Elena I. Vatajelu, Rosa Rodríguez-Montañés, Marco Indaco, Michel Renovell, Paolo Prinetto, Joan Figueras:
Read/write robustness estimation metrics for spin transfer torque (STT) MRAM cell. DATE 2015: 447-452 - [c19]Elena-Ioana Vatajelu, Giorgio Di Natale, Marco Indaco, Paolo Prinetto:
STT MRAM-Based PUFs. DATE 2015: 872-875 - [c18]Elena I. Vatajelu, Rosa Rodríguez-Montañés, Marco Indaco, Paolo Prinetto, Joan Figueras:
STT-MRAM cell reliability evaluation under process, voltage and temperature (PVT) variations. DTIS 2015: 1-6 - [c17]Elena I. Vatajelu, Rosa Rodríguez-Montañés, Stefano Di Carlo, Marco Indaco, Michel Renovell, Paolo Prinetto, Joan Figueras:
Power-aware voltage tuning for STT-MRAM reliability. ETS 2015: 1-6 - [c16]Elena-Ioana Vatajelu, Giorgio Di Natale, Lionel Torres, Paolo Prinetto:
STT-MRAM-Based Strong PUF Architecture. ISVLSI 2015: 467-472 - 2014
- [j2]Elena I. Vatajelu, Álvaro Gómez-Pau, Michel Renovell, Joan Figueras:
Sram cell stability metric under transient voltage noise. Microelectron. J. 45(10): 1348-1353 (2014) - [c15]Stefano Di Carlo, Marco Indaco, Paolo Prinetto, Elena I. Vatajelu, Rosa Rodríguez-Montañés, Joan Figueras:
Reliability estimation at block-level granularity of spin-transfer-torque MRAMs. DFT 2014: 75-80 - [c14]Marco Indaco, Paolo Prinetto, Elena I. Vatajelu:
On the impact of process variability and aging on the reliability of emerging memories (Embedded tutorial). ETS 2014: 1-10 - [c13]Elena I. Vatajelu, Hassen Aziza, Cristian Zambelli:
Nonvolatile memories: Present and future challenges. IDT 2014: 61-66 - [c12]S. Arcaro, Stefano Di Carlo, Marco Indaco, D. Pala, Paolo Prinetto, Elena I. Vatajelu:
Integration of STT-MRAM model into CACTI simulator. IDT 2014: 67-72 - 2013
- [j1]Farshad Moradi, Tuan Vu Cao, Elena I. Vatajelu, Ali Peiravi, Hamid Mahmoodi, Dag T. Wisland:
Domino logic designs for high-performance and leakage-tolerant applications. Integr. 46(3): 247-254 (2013) - [c11]Elena I. Vatajelu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine:
Adaptive Source Bias for Improved Resistive-Open Defect Coverage during SRAM Testing. Asian Test Symposium 2013: 109-114 - [c10]Elena I. Vatajelu, Georgios Tsiligiannis, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Aida Todri, Arnaud Virazel, Frederic Wrobel, Frédéric Saigné:
On the correlation between Static Noise Margin and Soft Error Rate evaluated for a 40nm SRAM cell. DFTS 2013: 143-148 - [c9]Elena I. Vatajelu, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine:
Analyzing the effect of concurrent variability in the core cells and sense amplifiers on SRAM read access failures. DTIS 2013: 39-44 - [c8]Elena I. Vatajelu, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine:
Analyzing resistive-open defects in SRAM core-cell under the effect of process variability. ETS 2013: 1-6 - [c7]Georgios Tsiligiannis, Elena I. Vatajelu, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Aida Todri, Arnaud Virazel, Frederic Wrobel, Frédéric Saigné:
SRAM soft error rate evaluation under atmospheric neutron radiation and PVT variations. IOLTS 2013: 145-150 - 2012
- [c6]Elena I. Vatajelu, Joan Figueras:
Efficiency evaluation of parametric failure mitigation techniques for reliable SRAM operation. DATE 2012: 1343-1348 - 2011
- [c5]Elena I. Vatajelu, Álvaro Gómez-Pau, Michel Renovell, Joan Figueras:
Transient Noise Failures in SRAM Cells: Dynamic Noise Margin Metric. Asian Test Symposium 2011: 413-418 - [c4]Elena I. Vatajelu, Joan Figueras:
Robustness analysis of 6T SRAMs in memory retention mode under PVT variations. DATE 2011: 980-985 - [c3]Elena-Ioana Vatajelu, Joan Figueras:
Statistical analysis of 6T SRAM data retention voltage under process variation. DDECS 2011: 365-370 - [c2]Nivard Aymerich, A. Asenov, Andrew R. Brown, Ramon Canal, Binjie Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio, Elena I. Vatajelu, Xavier Vera, Xingsheng Wang, Paul Zuber:
New reliability mechanisms in memory design for sub-22nm technologies. IOLTS 2011: 111-114 - 2010
- [c1]Elena I. Vatajelu, Georgios Panagopoulos, Kaushik Roy, Joan Figueras:
Parametric failure analysis of embedded SRAMs using fast & accurate dynamic analysis. ETS 2010: 69-74
Coauthor Index
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