| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e40ceab05afbe887909abf7467edd987 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S5-0213
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01S2304-12 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0265
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0254
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02458
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0242
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02642
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02639
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0262
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02647 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-02 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-323
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-205
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-205 |
| filingDate |
2002-02-25^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c778881a970c64b90b5357a36ce7947e
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_88be3ce86930d007415fd86192191f97
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_952bd48039a6d140c29f83baf2761aa3 |
| publicationDate |
2002-11-29^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2002343729-A |
| titleOfInvention |
Pendioepitaxial method for producing gallium nitride semiconductor layer on sapphire substrate and gallium nitride semiconductor structure produced thereby |
| abstract |
PROBLEM TO BE SOLVED: To manufacture gallium nitride devices with low cost and / or high availability. A gallium nitride semiconductor layer is manufactured by etching a lower gallium nitride layer on a sapphire substrate to define at least one column in the lower gallium nitride and at least one groove in the lower gallium nitride layer. Is done. At least one pillar includes a gallium nitride top and a gallium nitride sidewall. At least one groove includes a sapphire bottom. Gallium nitride sidewalls are laterally grown in the at least one trench, thereby forming a gallium nitride semiconductor layer. Prior to performing the lateral growth step, a sapphire bottom and a sapphire bottom are formed to prevent the growth of gallium nitride from the trench bottom from interfering with the lateral growth of the gallium nitride sidewalls of the at least one column into the at least one trench. Mask the gallium nitride top. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2010532916-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014052526-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011155164-A |
| priorityDate |
1999-11-17^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |