http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10734500-B2

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filingDate 2018-10-09^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2020-08-04^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_49ea9a43a2db7ba7662ef69de89fb7af
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publicationDate 2020-08-04^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber US-10734500-B2
titleOfInvention Horizontal gate all-around device having wrapped-around source and drain
abstract Various transistors, such as horizontal gate-all-around transistors, and methods of fabricating such are disclosed herein. An exemplary transistor includes a first nanowire and a second nanowire that include a first semiconductor material, a gate that wraps a channel region of the first nanowire and the second nanowire, and source/drain feature that wraps source/drain regions of the first nanowire and the second nanowire. The source/drain feature includes a second semiconductor material that is configured differently than the first semiconductor material. In some implementations, the transistor further includes a fin-like semiconductor layer disposed over a substrate. The first nanowire and the second nanowire are disposed over the fin-like semiconductor layer, such that the first nanowire, the second nanowire, and the fin-like semiconductor layer extend substantially parallel to one another along the same length-wise direction. The fin-like semiconductor layer includes a third semiconductor material that is configured differently than the first semiconductor material.
priorityDate 2015-11-16^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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