| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36333273e27f0db23ddddbf80ba79ba7 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-0054
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-0025 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00238
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-89
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C3-001
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00801
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-008
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76232 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81C3-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81B7-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762 |
| filingDate |
2014-06-17^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2016-09-20^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_bf9d52cf6990ca5fba804acff912e62c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8fbd1a95bf10cbc8f3225757122e756c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_120db39b65296777f894527aab39e906
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_612f44747c92e970df391b6fd70329fa
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_341dc86485d4ab18e1eae605a79dd860
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6a3c50d9a919106c271539b09dd07041
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_915827967ebfbbedc9d556f8e7a8f367
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_55412d7c32e9f0de183e7072f5dcb91e |
| publicationDate |
2016-09-20^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-9449867-B2 |
| titleOfInvention |
VHF etch barrier for semiconductor integrated microsystem |
| abstract |
The present disclosure relates to an integrated microsystem with a protection barrier structure, and an associated method. In some embodiments, the integrated microsystem comprises a first die having a plurality of CMOS devices disposed thereon, a second die having a plurality of MEMS devices disposed thereon and a vapor hydrofluoric acid (vHF) etch barrier structure disposed between the first die and the second die. The second die is bonded to the first die at a bond interface region. The vHF etch barrier structure comprises a vHF barrier layer over an upper surface of the first die, and a stress reduction layer arranged between the vHF etch barrier layer and the upper surface of the first die. |
| priorityDate |
2014-06-17^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |