| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f3518dca003902d9f332ad08ac9a6ffe |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66659
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78624 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14616
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14689
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0886
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7835
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14645
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0882 |
| classificationIPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-146 |
| filingDate |
2018-01-19^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2021-05-25^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cc8d12a2a2263b403b6ef3802eb3a4cd
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f573157b52c395dafe96aae3c26bc9ab |
| publicationDate |
2021-05-25^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
US-11018171-B2 |
| titleOfInvention |
Transistor and manufacturing method |
| abstract |
The present technology relates to a transistor and a manufacturing method that make it possible to reduce noise. The transistor includes a gate electrode, a source region, and a drain region. The gate electrode is formed on a semiconductor substrate. The source region is formed on a surface of the semiconductor substrate and extended from the gate electrode. The drain region is positioned to oppose the source region and formed on the surface of the semiconductor substrate without being brought into contact with the gate electrode. The source region and the drain region are asymmetrical. The drain region is formed at a position deeper than the source region. At a gate end of the gate electrode, the drain region is formed at a distance from the surface of the semiconductor substrate. The present technology is applicable, for example, to an amplifying transistor. |
| priorityDate |
2017-02-03^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |